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Keywords: STA/Timing Methodology Engineer, Location: Bangalore, Karnataka

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STA/Timing Methodology Engineer

cycle and timing closure flow and methodology. Strong understanding of advanced STA concepts and challenges in advanced... Engineering or related work experience. As an STA CAD methodology lead, the role would expect the candidate to lead deployment...

Company: Qualcomm
Posted Date: 22 Oct 2024

STA/Timing Methodology Sr Engineer

work experience. STA/Timing CAD Methodology Lead As an STA CAD methodology lead, the role would expect the candidate... (but not limited to) STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence...

Company: Qualcomm
Posted Date: 22 Oct 2024

STA/Timing Methodology Sr Staff Engineer

work experience STA/Timing CAD Methodology Lead As an STA CAD methodology lead, the role would expect the candidate... (but not limited to) STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence...

Company: Qualcomm
Posted Date: 22 Oct 2024

STA Engineer | Static Timing Analysis & ECO generation | Synopsys PrimeTime, Tweaker, Prime Closure :: 7+ Years

methodologies and “best known methods” to streamline and automate physical design work. STA setup, convergence methodology, reviews.... Should have an experience in enabling the Tweaker/Primetime based ECO flows. Work on Automation scripts within STA tools for Methodology...

Company: Cisco Systems
Posted Date: 13 Nov 2024

STA/Timing Engineer

Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools... on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good...

Company: Qualcomm
Posted Date: 27 Oct 2024

Senior STA Methodology Engineer

timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools... Carlo. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining...

Company: Qualcomm
Posted Date: 22 Nov 2024

IR/PDN Methodology Engineer

engineer responsibilities would involve deploying new features/methodologies related to IR and IR-STA domain. Scope of the... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 22 Oct 2024

IR/PDN Methodology Staff Engineer

Design automation engineer responsibilities would involve deploying new features/methodologies related to IR and IR-STA... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 21 Oct 2024

STA Engineer

multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools... Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency...

Company: Qualcomm
Posted Date: 19 Dec 2024

Senior Staff STA CAD Engineer

services (CCDS). What You Can Expect Develop ,maintain and lead signoff static timing analysis (STA) and timing ECO flows..., extraction, and timing ECO flows and methodology. Recent experience with either Cadence Tempus or Synopsys PT-SI (experience...

Company: Marvell
Posted Date: 29 Nov 2024

CPU Physical Design Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... Engineering, Engineering, or related field. 2-4 yrs experience in Physical Design and timing signoff for high speed cores...

Company: Qualcomm
Posted Date: 28 Dec 2024

Physical Design Engineer, Senior

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... execution at block/SoC level along with PPA improvements Strong understanding of the technology and PD Flow Methodology...

Company: Qualcomm
Posted Date: 20 Dec 2024

Physical Design Engineer,Senior

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... execution at block/SoC level along with PPA improvements Strong understanding of the technology and PD Flow Methodology...

Company: Qualcomm
Posted Date: 20 Dec 2024

Senior Asic Design Engineer

synthesis, place-and-route, STA, power analysis Advanced digital verification methodology (e.g. UVM) Our commitment...Job Description: Description for Internal Candidates Senior Digital IC Design Engineer - Digital Compute Team...

Company: onsemi
Posted Date: 13 Dec 2024

Principal Engineer - ASIC development Engineering (DFT)

and debug issues independently. Good understanding of test constraints and support the STA teams for test mode timing closure..., we’re the next BIG thing in data. Job Description We are seeking a highly skilled and experienced DFT Engineer...

Posted Date: 12 Dec 2024

Physical Design Engineer

Knowledge on Clocking methodology and various techniques to improve skew, latency, timing, power. Familiarity with low-power... Implementation Engineer to take a key role in our semiconductor design team. As a PD Implementation Engineer, you will development...

Posted Date: 06 Dec 2024

CPU Physical Design Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... Design and timing signoff for high speed cores. Should have good exposure to high frequency design convergence for physical...

Company: Qualcomm
Posted Date: 05 Dec 2024

DFT Engineer :: Design for testability, JTAG, Scan and BIST,ATPG :: 7+ Years

methodologies and “best known methods” to streamline and automate physical design work. STA setup, convergence methodology, reviews.... Should have an experience in enabling the Tweaker/Primetime based ECO flows. Work on Automation scripts within STA tools for Methodology...

Company: Cisco Systems
Posted Date: 13 Nov 2024

CPU Physical design engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... and timing signoff for high speed cores. Should have good exposure to high frequency design convergence for physical design...

Company: Qualcomm
Posted Date: 13 Nov 2024

SMTS Silicon Design Engineer

. Understand timing margins (LVF/SSTA/Variations etc.) on the latest tech nodes and work with timing methodology teams for future... power check experience by VC-LP Static Timing Analysis experience by PT Experience in STA, constraints, timing signoff...

Posted Date: 28 Dec 2024