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Keywords: Senior FPGA/Hardware Design Engineer, Location: Brno, Jihomoravský

Page: 1

Senior FPGA/Hardware Design Engineer

We’re looking for a Senior FPGA/Hardware Design Engineer to join us in our Brno office as part of the platforms team...: At least 3 years Experience of FPGA development flows Demonstrable experience in RTL design in either Verilog, SystemVerilog...

Company: Codasip
Posted Date: 02 Dec 2024