Job description: We are looking for senior ASIC Synthesis and STA Engineer who will be responsible to prepare SDC and run physical synthesis using Synopsys...Job Title: ASIC Synthesis and STA Engineer Location: Santa Clara CA - Onsite role...
responsible for the Front-End Design Implementation methodology for all of NVIDIA's semiconductor products. As part of our team... for methodologies incorporating logic/physical synthesis, design planning, equivalence checking for industry-leading chip designs...
Job Title : Senior ASIC Physical Design Engineer Job Location: Santa Clara, CA (Hybrid) Key Responsibilities Chip... generation. Expertise in timing closure (STA) of high frequency blocks Handling blocks of high instance counts and complex...