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Keywords: STA/Timing Engineer, Location: Hyderabad, Telangana

Page: 1

STA/Timing Engineer

timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools... Carlo. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining...

Company: Qualcomm
Posted Date: 24 Jan 2025

STA/Timing Engineer

. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA.../FineSim, Monte Carlo. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts...

Company: Qualcomm
Posted Date: 24 Jan 2025

Staff Engineer - STA

into intelligence, inspiring the world to learn, communicate and advance faster than ever. JR72216 Staff Engineer - STA As a Design... Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used...

Company: Micron
Posted Date: 24 Jan 2025

STA Sr Engineer

, and Timing analysis. Exposure in scripting (Pearl/Python/TCL). IO timing sta reporting and signoff. Peripheral protocols... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 08 Dec 2024

STA Synthesis Engineer

Description: STA (static timing analysis), Verilog/VHDL, and Synthesis will serve you well on our team. Showcase your deep..., timing goals. - Delivery of timing clean, logically equivalent netlists to physical design team. - We will empower...

Posted Date: 23 Jan 2025

STA Engineer

Job Description : Key Responsibilities: Static Timing Analysis (STA): Perform comprehensive timing analysis... using tools like NanoTime for advanced process nodes (2nm/3nm). Develop and validate timing constraints for high...

Company: Uni Connect
Posted Date: 27 Dec 2024

MTS Silicon Design Engineer

integration of IP like eMMC, PCIE, USB, Ethernet etc Should know timing constraints for Synthesis/STA for an SoC Should be aware..._ MTS SILICON DESIGN ENGINEER Bachelors/Masters in Electrical engineering Relevant experience : 8+ years AMD...

Posted Date: 26 Jan 2025

Design for Testability (DFT) Engineer

As a DFT Engineer, you will be responsible for developing and implementing Design for Test methodologies for complex... to implement scan and clock constraints for timing closure. Optimize test time, power, and cost without compromising coverage...

Posted Date: 23 Jan 2025

CPU Physical Design Staff Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.... · Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure...

Company: Qualcomm
Posted Date: 23 Jan 2025

CPU Physical Design Staff / Sr Staff Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... and Route Implementation, Timing Closure, Low Power, Power Analysis and Physical Verification. · Create design of experiments...

Company: Qualcomm
Posted Date: 22 Jan 2025

CPU Physical Design Staff Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.... · Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure...

Company: Qualcomm
Posted Date: 19 Jan 2025

CPU Physical Design Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...: Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure...

Company: Qualcomm
Posted Date: 11 Jan 2025

MTS Silicon Design Engineer

of Synthesis, SCAN and DFT implementation 6. Static Timing analysis (STA). 7. Analysis: IR, EM, Noise. 8. Physical..._ MTS SILICON DESIGN ENGINEER KEY RESPONSIBILITIES: 1. Must have SoC implementation knowledge with deep level expertise...

Posted Date: 03 Jan 2025

Sr. Silicon Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE PERSON: You have a passion for modern, complex processor architecture, digital design... design in Verilog/SystemVerilog, Knowledge of system-level architecture including buses like AXI/AHB, bridges Circuit timing...

Posted Date: 01 Jan 2025

Sr. Silicon Design Engineer

, FPGA tools flow, using AMD AECG FPGAs, FPGA timing constraints, STA and timing closure Knowledge of system-level..._ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer...

Posted Date: 22 Dec 2024

SMTS Silicon Design Engineer

. PREFERRED EXPERIENCE: 10+ years of professional experience in Constraints generation, Synthesis, STA, full chip timing..._ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the EPIC server soc team , you will help bring to life cutting...

Posted Date: 20 Dec 2024

Silicon Design Engineer 2 ( ASIC CAD flow methodology Engineer )

_ SILICON DESIGN ENGINEER 2 THE ROLE: As a Silicon Design Engineer in the AMD CAD team, you will work with STA experts...: Timing analysis and timing closure methodology, flow development and support Maintain and add enhancements to the AMD STA...

Posted Date: 19 Dec 2024

MTS Synthesis Engineer

_ MTS SILICON DESIGN ENGINEER THE ROLE: As part of AIG silicon team, you will have opportunity to work with some of the...: As a Synthesis design engineer, you will work with architects/designers for IP development KEY RESPONSIBILITIES: Design synthesis...

Posted Date: 13 Dec 2024

PD Engineer

Full chip and partition level timing analysis. Evaluate low power techniques and power reduction opportunities Perform... on Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical...

Company: Quest Global
Posted Date: 16 Dec 2024

PD Engineer

Full chip and partition level timing analysis. Evaluate low power techniques and power reduction opportunities Perform... on Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical...

Company: Quest Global
Posted Date: 16 Dec 2024