Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: SOC Verification and Methodology Engineer, Location: San Diego, CA

Page: 1

SOC Verification and Methodology Engineer

and Methodology Engineer, you will be responsible for ensuring the quality and functionality of System-on-Chip (SOC) designs through... of SystemVerilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Knowledge of SOC...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 18 Jan 2025
Salary: $115600 - 173400 per year

Design Verification Engineer

including but not limited to: establishing DV methodology, test-plan development, verification environment development including... detailed test and coverage plans based on the micro-architecture You are responsible for developing verification methodology...

Company: Apple
Location: San Diego, CA
Posted Date: 22 Oct 2024

Mixed-Signal Verification Engineer

scripts for automation of flow. • Improve Mixed Signal verification methodology. Minimum Qualifications... using System Verilog. Experience in UVM methodology and HDL (System Verilog, Verilog) for verification...

Company: Apple
Location: San Diego, CA
Posted Date: 06 Nov 2024

SoC Physical Design Engineer, PnR

. Knowledge of physical design construction and analysis flows and methodology. Experience with large SOC designs (>20M gates... partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology...

Company: Apple
Location: San Diego, CA
Posted Date: 09 Jan 2025

SoC Design and Integration Engineer - Sr Eng

with minimal supervision Executes the design and verification strategies according to ASICs, SoC, and IP cores specifications... player with good communication skill. This is a great opportunity to join a fast-paced SoC team responsible for RTL Design...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 18 Nov 2024
Salary: $115600 - 173400 per year

ASIC Timing Engineer, Staff

Engineering General Summary: As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute... SOC products at the block/IP-level and at system-level in 5nm, 4nm and beyond (process technologies). You will be working...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 15 Jan 2025

RFIC Design Engineer

, Emulation, Design Verification, Test and Validation, and FW/SW engineering! As an RFIC Design Engineer within the Wireless Radio... team, you will be at the center of a wireless SoC design group, giving to Apple's groundbreaking wireless connectivity...

Company: Apple
Location: San Diego, CA
Posted Date: 31 Oct 2024

RFIC - PLL Design Engineer

, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As an RFIC - PLL Design Engineer within the Wireless... (EMX, HFSS), and similar tools. Familiarity with mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime...

Company: Apple
Location: San Diego, CA
Posted Date: 31 Oct 2024

RFIC Design Engineer

and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering! As an engineer within the Wireless Radio... team, you will be at the center of a wireless SoC design group, chipping in to Apple's innovative wireless connectivity...

Company: Apple
Location: San Diego, CA
Posted Date: 25 Oct 2024

Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

of critical design IPs for path to DDR. This is a great opportunity to join a fast-paced SoC team responsible for development... of next Generation, high performance, low power Memory Subsystem RTL Design, flows and methodology for high performance ASICs in sub-4nm...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 17 Nov 2024