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Keywords: RTL Engineer, Location: Bangalore, Karnataka

Page: 7

Senior Digital Design Engineer

at different stages – RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence... catalog of digital IPs to enable ease of information sharing to customers across different BUs Develop User Guides for RTL...

Posted Date: 19 Nov 2024

Digital Design Engineer

into design flow at different stages – RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming... Develop User Guides for RTL Integration, Synthesis, DFT, PnR, Programming Sequence, characterization etc Establish...

Posted Date: 13 Nov 2024

NoC Systems Engineer

like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts Good knowledge of Digital Design and RTL development Hands-on experience... with SoC Design, Verilog RTL coding Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols...

Company: Qualcomm
Posted Date: 01 Nov 2024

STA/Timing Engineer

automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus...

Company: Qualcomm
Posted Date: 26 Oct 2024

SMTS Silicon Design Engineer AECG ASIC DV Lead

Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches Experienced...

Posted Date: 23 Oct 2024

Senior Staff Physical Design Engineer

with the RTL design team to drive modifications that address congestion and timing issues. Collaboration with the frontend... of standard RTL to GDS flows and methodology, experience in designing ICs at advanced technology nodes (e.g., 7nm, 5nm...

Company: Marvell
Posted Date: 17 Oct 2024

Staff Digital Engineer

job training. Qualifications Qualifications: • Experience in Logic design /micro-architecture / RTL coding. • Must have hands...

Posted Date: 11 Oct 2024

Senior Digital Engineer

job training. Qualifications: Experience in Logic design /micro-architecture / RTL coding. Must have hands on experience...

Posted Date: 11 Oct 2024

Staff DFT Engineer

, compression, and built-in self-test structures to enhance testability. Conduct DFT DRC checks in RTL/Netlist database to ensure... of DFT structures/patterns in RTL, Netlist with and without SDF. Work closely with the verification team to define...

Posted Date: 02 Oct 2024

Staff Engineer, Digital Design

and Responsibilities: Ownership of developing the specification, micro architecture, and RTL design of modules as per requirements.... 10+ years of solid digital logic design experience in hands-on and/or technical leadership.. Strong hands-on RTL coding...

Posted Date: 02 Oct 2024

Full chip SoC timing lead

_ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Strategic Silicon Solution Group Full Chip Physical Design... and problem-solving skills. Should have hands on Physical Design experience and must have handled RTL to GDS II at Top level...

Posted Date: 28 Dec 2024

ASIC Design Engr 2

networks that generate billions in service revenue for our customers. Title: ASIC Physical Design Engineer Location: India... cycle from RTL to GDSII and understanding of underlaying concepts of IC design, implementation flows and methodologies...

Company: Infinera
Posted Date: 21 Dec 2024

Frontend CAD Developer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.../Verification steps, RTL/System Verilog and UVM methodologies Knowledge of Clearcase Perforce, GIT, Makefiles Database design...

Company: Qualcomm
Posted Date: 19 Dec 2024

WEE - ER

Family GoLang Data Engineer Java Full Stack (React) Java Full Stack (Angular) .Net Full Stack (React) Java FS DotNet... Cell Physical Design DFT RTL Design & Verification Android Framework C++ Developer (QT/QML) Autosar Java Selenium...

Company: Wipro
Posted Date: 18 Dec 2024

Associate II - VLSI-Physical Design-SV

Job Description: · Physical Design Engineer Experience: 4- 7 Years Desired Skills and Experience: · Engineers... Flow fand able to handle RTL/Netlist to GDSII independently at block level and should have done multiple tape outs (Low...

Company: UST
Posted Date: 15 Dec 2024

Associate II - VLSI Analog Char/.Lib

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes...

Company: UST
Posted Date: 08 Dec 2024

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS...

Company: UST
Posted Date: 07 Dec 2024

Associate II - VLSI

work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks... from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes...

Company: UST
Posted Date: 07 Dec 2024

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS...

Company: UST
Posted Date: 07 Dec 2024

Analog Mixed Signal Design Verification Lead

(TI) is looking for an Analog Mixed Signal Design Verification Engineer to join the team of enthusiastic engineers who develops highly complex mixed... Engineer Domain : Audio Amplifiers Location : Bangalore Basic Qualifications: Bachelor's/Master's Degree in EE...

Posted Date: 04 Dec 2024