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Keywords: RTL Design Engineer, Location: Cupertino, CA

Page: 1

RTL Design Engineer

hardworking RTL Design Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft... of RTL design fundamentals Deep knowledge of Verilog and System-Verilog Deep knowledge of front-end tools (Verilog...

Company: Apple
Location: Cupertino, CA
Posted Date: 29 Mar 2025

RTL Design Engineer

chain-of-thought reasoning. RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring... development. Experience with high-speed digital logic. Proficiency in standard RTL design and synthesis tools Familiarity...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025
Salary: $2000 per month

Mixed-Signal Clocking and Control RTL Design Engineer

Clocking and Control RTL Design position on our team. As a valued member of this group, you will have the opportunity... and phase interpolators. The logic design will involve working with multiple clocks, complex clock domain crossings, signal...

Company: Apple
Location: Cupertino, CA
Posted Date: 28 Feb 2025

Mixed-Signal Clocking and Control RTL Design Engineer

Clocking and Control RTL Design position on our team. As a valued member of this group, you will have the opportunity... and phase interpolators. The logic design will involve working with multiple clocks, complex clock domain crossings, signal...

Company: Apple
Location: Cupertino, CA
Posted Date: 28 Feb 2025

Physical Design Engineer

chain-of-thought reasoning. Physical Design Engineer Etched is looking for exceptional PD engineers to join our team... Tools, flow, and design methodology from RTL synthesis to GDSII sign-off Experience with back-end design and timing...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025
Salary: $2000 per month

Design Verification Engineer

that no one has solved yet? Do you like changing the game? We have an opportunity for an outstandingly hardworking design... verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft...

Company: Apple
Location: Cupertino, CA
Posted Date: 14 Feb 2025

ASIC Design Engineer - Pixel IP

on suggested architecture(s) and algorithm(s) Perform RTL design and logic implementation of agreed architecture Integrate... detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 10 Apr 2025

FPGA Designer (Display Silicon Digital Architect)

. Description - Work with multi-functional teams to converge on display silicon functionality - Use existing silicon and design FPGAs... industry experience in EE, Silicon, or FPGA designs or applications Experience with Digital Architecture, RTL Coding...

Company: Apple
Location: Cupertino, CA
Posted Date: 06 Mar 2025

Sr. SoC Power Engineer, Annapurna Labs, Cloud Scale Machine Learning

project at the ground level by modeling and estimating power at every stage of the design from early RTL to final netlist... chip power analysis & modelling at various stages of design (RTL to gate level netlist) - Develop and maintain dashboards...

Company: Amazon
Location: Cupertino, CA
Posted Date: 16 Apr 2025
Salary: $143300 per year

Senior Software Development Engineer, Annapurna Labs, Trainium Collectives

DESCRIPTION We are seeking an experienced engineer to work on distributed AI/ML systems. This role involves working... experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the globe and is truly international...

Company: Amazon
Location: Cupertino, CA
Posted Date: 09 Apr 2025
Salary: $151300 per year

Software Development Engineer, HPC/ML Interconnect Engineer, Annapurna Labs

DESCRIPTION We are seeking an experienced engineer to work on distributed AI/ML systems. This role involves working... experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the globe and is truly international...

Company: Amazon
Location: Cupertino, CA
Posted Date: 06 Apr 2025
Salary: $129300 per year

Senior Software Development Engineer, Annapurna Labs, Trainium Collectives, Elastic Collectives

DESCRIPTION We are seeking an experienced engineer to work on distributed AI/ML systems. This role involves working... experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the globe and is truly international...

Company: Amazon
Location: Cupertino, CA
Posted Date: 06 Apr 2025
Salary: $151300 per year

Sr. Software Development Engineer, HPC/ML Networking Engineer, Annapurna Labs

DESCRIPTION We are seeking an experienced engineer to work on distributed AI/ML systems. This role involves working... experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the globe and is truly international...

Company: Amazon
Location: Cupertino, CA
Posted Date: 06 Apr 2025
Salary: $151300 per year

Sr. Software Development Engineer, HPC/ML Networking Engineer, Annapurna Labs

DESCRIPTION We are seeking an experienced engineer to work on distributed AI/ML systems. This role involves working... experts, hardware engineers, RTL engineers, scientists & architects. Our workforce spans the globe and is truly international...

Company: Amazon
Location: Cupertino, CA
Posted Date: 05 Apr 2025
Salary: $151300 per year

SoC Power Flow Methodology Engineer

, you'll help deliver cutting-edge new technology and capabilities for low-power chip design that fuels Apple's next-generation... on highly visible products used by millions of people every day! Description As a Power Flow Methodology Engineer, you'll...

Company: Apple
Location: Cupertino, CA
Posted Date: 19 Mar 2025

SoC Power Flow Methodology Engineer

, you'll help deliver cutting-edge new technology and capabilities for low-power chip design that fuels Apple's next-generation... on highly visible products used by millions of people every day! Description As a Power Flow Methodology Engineer, you'll...

Company: Apple
Location: Cupertino, CA
Posted Date: 06 Mar 2025
Salary: $121900 - 183600 per year

Performance Modeling Engineer

integration with infrastructure, thorough testing, and debugging. Collaborate closely with architecture, RTL design, design... architecture, SoC design, and RTL languages. Experience solving ambiguous problems. Excellent verbal and written communication...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025

ASIC Timing Engineer

chain-of-thought reasoning. ASIC Timing Engineer Etched is seeking an exceptional ASIC Timing Engineer... analysis and closure of chips at block, cluster, and full chip level Collaborate with Physical Design, DFX, Clocks...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025
Salary: $2000 per month

Graphics Power Engineer, Platform Architecture

! We are seeking a highly motivated, innovative, and dedicated engineer to join the GPU Platform Architecture Team; we are a group..., you will be at the center of a chip design effort working with all disciplines, with a critical impact on getting high performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 06 Feb 2025

Emulation Verification Engineer

! We are looking for you to join our design verification team focusing on the creation, deployment, and support of sophisticated emulation environments.... In this highly transparent role, you will be at the center of a chip design effort collaborating with Architecture, Design and SW...

Company: Apple
Location: Cupertino, CA
Posted Date: 13 Mar 2025