. Micro-architecture of ASIC blocks and sub-systems Design and implement complex RTL logic (mainly Verilog or System Verilog... and lead them through complex technical issues Requirements The ideal individual is a staff / principal IC Design Engineer...
. Develop synthesis and timing constraints for complex block and sub-systems Design and implement complex RTL logic (mainly... / principal IC Design Engineer with the following... Minimum of an undergraduate degree in EE or equivalent skills/experience...