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Keywords: Logic Design Methodology Engineer, Location: Santa Clara, CA

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Logic Design Methodology Engineer

Job Details: Job Description: Come join us as a Logic Design Methodology Engineer and together let's grow... and develop the next leading technology. As the Logic Design Methodology Engineer of the Platform Engineering Solution Group...

Company: Intel
Location: Santa Clara, CA
Posted Date: 28 Mar 2025

Senior IP Logic Design Engineer

level (RTL) development for the IP block and implements the specification for logic components Ensures quality of design... Applies various strategies, tools and methods to write RTL and optimize logic to qualify the design to meet power, performance...

Company: Intel
Location: Santa Clara, CA
Posted Date: 19 Feb 2025

DFX Methodology Engineer

We are now looking for a DFT Methodology Engineer! NVIDIA has continuously reinvented itself over two decades... to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 02 Apr 2025

Senior DFX Methodology Engineer

We are now looking for a DFT Methodology Engineer! NVIDIA has continuously reinvented itself over two decades... to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 05 Mar 2025

Senior Software Engineer, Hardware Tools and Methodology Development

is looking for a dedicated and motivated Software developer with particular interest in algorithms and RTL Design. Understanding both Software... and Hardware principles will be a key requirement for this role. What you'll be doing: Architect, design, develop and support...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Mar 2025

GPU Design Verification Engineer

for you. We are looking for Graphics Design/Verification Engineer to join our team. In this position, you will be playing a key role in the pre-silicon... will exhibit the following behavioral traits: Ability to drive and improve digital design methodology to achieve high quality...

Company: Intel
Location: Santa Clara, CA
Posted Date: 07 Apr 2025

Senior SoC Design Emulation Engineer

for, but not limited to: Emulating/Prototyping complex SoCs. Performs functional logic verification of an integrated SoC to ensure... design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans...

Company: Intel
Location: Santa Clara, CA
Posted Date: 02 Apr 2025

GPU Design Verification Engineer

for you. We are looking for Graphics Design/Verification Engineer to join our team. In this position, you will be playing a key role in the pre-silicon... will exhibit the following behavioral traits: Ability to drive and improve digital design methodology to achieve high quality...

Company: Intel
Location: Santa Clara, CA
Posted Date: 31 Mar 2025

Physical Design Engineer

and route of RTL blocks for high speed datapath and control logic applications, automated design flows for clock tree synthesis.../area, and design cycle time reduction. You will also support floorplanning, establishing design methodology, IP integration...

Posted Date: 29 Mar 2025

Design Verification Engineer

Job Details: Job Description: Come join us as a Design Verification Engineer and together let's grow and develop.... Key Responsibilities: Performs functional logic verification of an integrated SubSystem to ensure design will meet...

Company: Intel
Location: Santa Clara, CA
Posted Date: 21 Mar 2025

Senior ASIC Design Engineer

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented... such as Floorsweep, In-silicon measurement, Reset and Boot controllers. You will be responsible for the RTL design, logic synthesis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Mar 2025

Sr. Staff CPU Physical Design CAD Engineer

-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support... of computer architecture, micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 07 Mar 2025

Design Verification, Senior Staff Engineer

Expect ASIC design engineer responsible for the design, verification and evaluation of digital circuits in high-speed data... development and execution. As a senior member in the team, he/she will focus on improving the design verification methodology...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 Jan 2025
Salary: $121840 - 182500 per year

Senior Principal Design Verification Engineer

correctness and performance of the design. Own and debug failures in simulation to root-cause problems Closely work with logic..., advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Mar 2025

Sr. Staff EMIR CAD Engineer

project-specific issues Work closely with worldwide CPU physical design teams, and provide methodology guidance and tools..., micro-architecture, logic design, circuits, and/or physical design to develop and verify critical high performance and low...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 20 Mar 2025

SoC Emulation Firmware Engineer

to: Conducting functional logic verification of an integrated SoC to ensure design meets specifications. Developing and refining... Emulation Firmware Engineer, you will play a critical role in developing cutting-edge firmware for System-on-Chip (SoC...

Company: Intel
Location: Santa Clara, CA
Posted Date: 27 Feb 2025

Senior High-Performance ASIC Timing Engineer

to understand and improve existing flows and methodologies. Familiarity with methodology and tools, logic synthesis, equivalence...+ years’ experience in ASIC Design and Timing Hands-on experience in STA tools, ECO implementation, and timing closure...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Mar 2025

Senior System Integration Engineer

to drive design, development, debug, and release of next-generation products. What we need to see: BS or MS degree... and debug. Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Mar 2025

Senior Post Silicon Hardware Engineer

to drive design, development, debug, and release of next-generation products. What we need to see: BS or MS degree... and debug. Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Mar 2025

Senior Synthesis Flow Development Engineer

, to amplify human inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology! We're... responsible for the Front-End Design Implementation methodology for all of NVIDIA's semiconductor products. As part of our team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Mar 2025