Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: IP/Subsystem Verification Lead, Location: Bangalore, Karnataka

Page: 1

IP/Subsystem Verification Lead

junior engineers. PREFERRED EXPERIENCE: Proficient in IP or Sub-system level ASIC verification Architected..._ THE ROLE: The Infinity Fabric transport layer verification team is looking for an experienced pre-silicon verification...

Posted Date: 27 Feb 2025

IP/ Subsystem Verification Lead

random tests to meet the coverage requirements PREFERRED EXPERIENCE: Proficient in IP level ASIC verification..._ THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD...

Posted Date: 05 Feb 2025

Verification Engineer, Digital IP

on IP/Sub-System Verification Proven experience in testbench design and development using UVM methodology for IP/Subsystem...Job Title: Sr. Lead Verification Engineer Primary Location: Bengaluru, India Role Summary: We are part of MCU/MPU...

Posted Date: 13 Feb 2025

Sr. Principal Verification Engineer, Digital IP

on IP/Sub-System Verification Prior experience as a tech lead or DV manager is strongly preferred Proven experience... safety and security standards. Job Responsibility: Responsible for the pre-silicon verification of IP modules or, IP...

Posted Date: 08 Feb 2025

DSP / NPU Design Verification Sr lead Engineer

from chipsets and royalties from intellectual property. Job Responsibilities: · Drive design verification of DSP IP by working... environments, and meet coverage goals. · Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level...

Company: Qualcomm
Posted Date: 27 Feb 2025

Turing Design Verification - Sr Lead Engineer

Engineering General Summary: Our team here works on the Verification of advanced IP's, HW Accelerators and Subsystem for AI/ML... Get to work on the latest and cutting-edge tech nodes Required to work on IP verification and own various DV tasks...

Company: Qualcomm
Posted Date: 24 Jan 2025

DSP / NPU Design Verification Sr lead Engineer

and royalties from intellectual property. Job Responsibilities: · Drive design verification of DSP IP by working with a global..., and meet coverage goals. · Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails...

Company: Qualcomm
Posted Date: 23 Jan 2025

Formal Verification Lead

related to Formal flow. PREFERRED EXPERIENCE: Prior experience on Formal verification on Complex IP's. Proficiency..._ THE ROLE: The Infinity Fabric transport layer verification team is looking for an experienced Formal Verification...

Posted Date: 13 Dec 2024

Staff / Principal GPU Verification Engineer

demands and improvements for graphics IP. You will: Oversee all verification activities for a GPU component or subsystem... verification methodologies. Lead, mentor, and support team members in verification activities. Engage in design and verification...

Posted Date: 28 Feb 2025

Deisgn Verification Engineer

you will be responsible to work at IP, Subsystem or SoC verification related tasks. Responsibilities: Responsible for implementing System... Design verification certification course. Strong understanding of design concepts and ASIC flow. Strong understanding...

Posted Date: 06 Dec 2024

Platform Emulation Lead

_ SMTS SYSTEMS DESIGN ENGINEER (Platform Emulation Lead ) THE ROLE: We are looking for a dynamic, energetic Lead... will be necessary towards product development, definition, and root cause resolution. KEY RESPONSIBILITIES: Lead Engineer...

Posted Date: 12 Feb 2025

Technical Lead II - VLSI PD

contributor take ownership for any one or more task/module of RTL Design/Module Verification/PD/DFT/Circuit Design/Analog Layout... PT/Tempus Calibre etc. (experience with one or more tools) Technical Knowledge:a. Implement IP Spec Architecture Design...

Company: UST
Posted Date: 26 Feb 2025

Physical Design - MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER As the SoC Subsystem Physical Design Lead, you will lead the physical design..., DFT and IP teams to ensure seamless subsystem integration and resolve physical design issues that impact overall system...

Posted Date: 28 Feb 2025

SoC Functional Validation Engineer

Memory Validation and Debug Lead to join our post silicon validation team. In this role, you will lead memory subsystem... products. You will work closely with cross-functional teams, including design, MRC , EV (analog) verification, and validation...

Company: Intel
Posted Date: 26 Feb 2025

Associate III - VLSI PD SV

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 26 Feb 2025

Principal Engineer, RTL ASIC Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit... with cross-functional teams, IP Vendors and customers Implement a specification using RTL coding techniques and best practices...

Company: Marvell
Posted Date: 12 Feb 2025

PMTS Silicon Design Engineer

SOC level verification activities for the domains, subsystem or signature IP’s in the complex SOC. He will be responsible... data path verification and coherency across fabric. Expertise in IP, Subsystem and SOC Verification with specialization...

Posted Date: 25 Jan 2025