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Keywords: Full Chip Layout - Physical Architect, Location: Santa Clara, CA

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Full Chip Layout - Physical Architect

Job Details: Job Description: Come join us as a Full Chip Layout - Physical Architect and together let's grow... any technical task in SoC physical Design work. Documented experience in technically leading past SoC full chip level physical...

Company: Intel
Location: Santa Clara, CA
Posted Date: 21 Mar 2025

CXLCM micro-Architect/Senior Logic Design Engineer

libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs... with chip-to-chip communication between CPU, memory and accelerator on cutting edge technology node. Oversees definition...

Company: Intel
Location: Santa Clara, CA
Posted Date: 21 Mar 2025

Director, SOC Design

analysis, full-chip simulation and emulation, performance and power analysis and debug. Work with third party vendors...) Business Unit closely collaborates with strategic customers in the development of advanced and highly complex System-on-Chip...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 23 Feb 2025