Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Design Verification Methodology Engineer - (UVM/SV), Location: Austin, TX

Page: 1

Design Verification Methodology Engineer - (UVM/SV)

will assume: Be a part of a wider team of technical experts in design verification in AMD’s Central R&D team Develop UVM..._ THE ROLE: The AMD Verification Methodology and Technology (VMT) team delivers verification methodology and technology...

Location: Austin, TX
Posted Date: 23 Jan 2025

ASIC Engineer, Design Verification

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals... silicon success. ASIC Engineer, Design Verification Responsibilities Define and implement IP/SoC verification plans, build...

Company: Meta
Posted Date: 28 Dec 2024