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Keywords: Design Verification Engineer, Location: Santa Clara, CA

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CPU Processor Power Management Verification Engineer

. Description Description As a Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely... to verify the design • Write assertions and apply formal verification to the design Minimum Qualifications...

Company: Apple
Location: Santa Clara, CA
Posted Date: 09 Nov 2024

CPU Processor Power Management Verification Engineer

. Description Description As a Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely... to verify the design • Write assertions and apply formal verification to the design Minimum Qualifications...

Company: Apple
Location: Santa Clara, CA
Posted Date: 09 Nov 2024

CPU Processor Power Management Verification Engineer

. Description Description As a Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely... to verify the design • Write assertions and apply formal verification to the design Minimum Qualifications...

Company: Apple
Location: Santa Clara, CA
Posted Date: 09 Nov 2024
Salary: $121900 - 183600 per year

CPU DFT Verification Engineer

verification team focusing on DFT verification. In this highly visible role, you will be at the center of a chip design effort.... Description Description As a DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL designers...

Company: Apple
Location: Santa Clara, CA
Posted Date: 09 Nov 2024
Salary: $121900 - 183600 per year

CPU DFT Verification Engineer

verification team focusing on DFT verification. In this highly visible role, you will be at the center of a chip design effort.... Description Description As a DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL designers...

Company: Apple
Location: Santa Clara, CA
Posted Date: 08 Nov 2024

Sr Logic Design RTL Engineer

: Sr Logic Design (RTL) Engineer Location: Santa Clara, CA (Remote and Hybrid options available) Job Type: Contract... checks, CDC tests, and create timing constraint files Support verification and physical design teams Execute low power...

Company: PDDN INC.
Location: Santa Clara, CA
Posted Date: 25 Jan 2025
Salary: $78 per hour

RF Board Design Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.../Electronics Engineering, Engineering, or related field. 1+ year of experience with circuit design (e.g., digital, analog, RF...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 25 Jan 2025
Salary: $111300 - 166900 per year

Senior Mixed-Signal Design Engineer

Design Engineer. As a member of our Mixed-Signal team, you will be leading architecture definition and design of CMOS high... Become involved in the design, simulation, and verification of mixed-signal circuits Lead mask designers, provide mentorship...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2025

Sr. Analog Design Engineer

as experience in debugging/verifying design issues, plus capability to do analog layout. As an Analog Circuit Design Engineer...We are looking for qualified Sr. Analog circuit design engineers who have a good understanding of analog circuit...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 25 Jan 2025
Salary: $130000 - 150000 per year

Senior Mask Design Engineer

Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout... Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling complex...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2025

Digital Design (RTL) Engineer

Role: Digital Design (RTL) Engineer Location: Santa Clara, CA -Remote work option allowed... and timing quality of the design, checking low power implementation, supporting verification team with debug and support physical...

Posted Date: 24 Jan 2025

Senior Physical Design Methodology Engineer

deveploment, chip assembly, and back-end verification across multiple projects. Conduct chip layout circuit design, circuit...We are part of the global circuits team at NVIDIA that design the state-of-the-art GPUs for all applications...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Jan 2025

CPU Physical Design and Integration Engineer

quickly. Description Description As a CPU Physical Design and Integration Engineer, you will be participating in the... physical design, integration, and verification of high performance, low power processor development. • Full chip floorplan...

Company: Apple
Location: Santa Clara, CA
Posted Date: 17 Jan 2025

CPU Physical Design and Integration Engineer

quickly. Description Description As a CPU Physical Design and Integration Engineer, you will be participating in the... physical design, integration, and verification of high performance, low power processor development. • Full chip floorplan...

Company: Apple
Location: Santa Clara, CA
Posted Date: 17 Jan 2025

Analog Design Engineer

as experience in debugging/verifying design issues, plus capability to do analog layout. As an Analog Circuit Design Engineer...We are looking for qualified Analog circuit design engineers who have a good understanding of analog circuit and CMOS...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 17 Jan 2025
Salary: $110400 - 135500 per year

Senior ASIC Design Engineer - Memory Controller

We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll...-architecture and design including RTL design, synthesis, functional verification and timing analysis using groundbreaking CAD tools...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Jan 2025

Serdes Analog Mixed Signal Design Engineer

Title: Analog Design Engineer - High-Speed SerDes Location: San Jose, California Meta Description: Nexus.... Responsibilities Architecture study and evaluation of advanced high-speed SerDes topologies. Design and verification of high...

Posted Date: 31 Dec 2024
Salary: $145000 - 220000 per year

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA... RTL design, synthesis, functional verification and timing analysis using innovative CAD tools and using the latest process...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Dec 2024

Memory RTL Design Engineer

_ THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware..., complex processor architecture, digital design, and verification in general. You are a team player who has excellent...

Posted Date: 18 Dec 2024

Staff Physical Design Engineer

. As a Staff Physical Design Engineer with expertise in Block Place and Route (PNR), you’ll collaborate with Marvell’s cutting-edge.... Collaborative Physical Design Process: Partner with frontend, integration, and verification teams to ensure alignment...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2024
Salary: $100840 - 151000 per year