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Keywords: Applications Engineering Manager for Physical Design/Testchip, Location: Santa Clara, CA

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Applications Engineering Manager for Physical Design/Testchip

Engineering Manager position within the Design Enablement (DTP) organization of Technology Development (TD) is chartered... as an Applications and Support Manager position leading a team that drives customer solutions for ASIC tools/flows and Physical...

Company: Intel
Location: Santa Clara, CA
Posted Date: 14 Apr 2025