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Keywords: Synthesis Engineer, Location: Bangalore, Karnataka

Page: 5

Staff Engineer, Digital Design

, synthesis, and Static-timing-analysis. Co-work with the verification and PD team for coverage and timing closure respectively.... Lint check and Clock domain crossing analysis Sanity Synthesis runs. Support post silicon debug activities Hire , mentor...

Posted Date: 02 Oct 2024

Memory Team - Physical Design Engineer

Position Summary Complex SOC Top Physical Implementation for next generation SoCs by means of Synthesis , Place... and full-chip SDC cleanup, Synthesis optimization , Low Power checking and logic equivalence checking - Familiar with deep...

Company: 삼성전자
Posted Date: 01 Oct 2024

Wifi MAC -Design Engineer -Sr Lead

worldwide Extensive experience in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX..., Primetime, Conformal ECO Extensive experience in UPF based power intent and synthesis High-speed and Low-power 5G and WLAN...

Company: Qualcomm
Posted Date: 29 Sep 2024

ASIC Engineer

synthesis, prototyping, DFT, timing analysis, floor planning, ECO, bring up and lab debug is a prerequisite for this role...

Company: Nvidia
Posted Date: 29 Sep 2024

Sr Principal Digital Engineer

closely with functional verification teams on test-plan development and debug. Understand timing constraints, run synthesis... coding, Linting, CDC, Synthesis Must be experienced with integration of IPs and delivery of top level digital Having...

Posted Date: 27 Sep 2024

Senior Staff Engineer - Physical Design

of global Implementation team plays a key role in Netlist to GDS implementation, covering Synthesis, P&R, Timing, PV and Power... as well as subsystem/partition level physical implementation using industry-standard PNR tools (Synthesis to GDS). Should have experience...

Company: Marvell
Posted Date: 15 Sep 2024

Physical Design Engineer

on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing...

Company: IBM
Posted Date: 12 Sep 2024

ASIC/IP Design Engineer -Sr (Bluetooth)

, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 2-6 years...

Company: Qualcomm
Posted Date: 12 Sep 2024

RTL Design Engineer- Sr Lead(Modem)

constraints, run synthesis, floorplan the design for the target FPGA, run place & route tools and generate bit files... all aspects of FPGA design; constraint definition, synthesis, floor planning, P&R, Timing closure, bitfile generation...

Company: Qualcomm
Posted Date: 12 Sep 2024

ASIC/IP Design Engineer -Sr (Bluetooth)

, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 2-6 years...

Company: Qualcomm
Posted Date: 12 Sep 2024

Senior Engineer, Digital Design Engineer

) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence..., DFT concepts, power analysis Experience with developing timing constraints and ability to carry out logic synthesis...

Posted Date: 12 Sep 2024

IP Design Engineer (Bluetooth team)

, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 0 to years... and/or Python Skills RTL Design, Linting Tools, Synthesis, Timing Analysis, Low-Power Design Minimum Qualifications...

Company: Qualcomm
Posted Date: 12 Sep 2024

Serdes PHY Analog Design Engineer

synthesis and/or SerDes applications Charge pump, loop filter, VCO/DCO, PFD/TDC, high speed dividers. PLL Loop Dynamics...

Company: Qualcomm
Posted Date: 04 Sep 2024

ASIC RTL Design - (Turing/AI ML) Sr Eng/Sr Lead/Staff Engineer

sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power...

Company: Qualcomm
Posted Date: 04 Sep 2024

SMTS Silicon Design Engineer

, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification...

Posted Date: 31 Aug 2024

Verification Engineer, Low Power

aspects. Work with architects, designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams...

Company: Nvidia
Posted Date: 29 Aug 2024

Digital Design Implementation Engineer

including DFT, apply design fixes to achieve high test quality Implement Soc DFT strategy and architecture Synthesis including...

Posted Date: 28 Aug 2024

Senior Engineer

and Digital Front end (Synthesis, Linting etc) would be an added advantage For positions requiring access to technical data...

Posted Date: 25 Aug 2024

Verification Engineer, Low Power

aspects. Work with architects, designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams...

Company: Nvidia
Posted Date: 25 Aug 2024

Emulation Engineer - Senior Lead

for adapting the design for FPGA, come up the timing constraints, run synthesis, floorplan the design for the target FPGA, run... coding of complex designs using Verilog/SV Expertise in all aspects of FPGA design; constraint definition, synthesis, floor...

Company: Qualcomm
Posted Date: 15 Aug 2024