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Keywords: Staff ASIC Physical Design Engineer, Location: USA

Page: 2

Senior Staff Emulation Engineer - ZEBU

design center (ODC) or staff augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification..., Emulation, FPGA based validation, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup...

Company: Prodapt
Location: San Jose, CA
Posted Date: 05 Dec 2024

Senior Staff Emulation Engineer - ZEBU

design center (ODC) or staff augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification..., Emulation, FPGA based validation, DFT, RTL2GDSII, Physical Design using ICC2 and Innovus, Mask Layout, Firmware, Silicon Bringup...

Company: Prodapt
Location: San Jose, CA
Posted Date: 04 Dec 2024

Staff Engineer - Firmware Development Infra

, we’re the next BIG thing in data. Job Description ESSENTIAL DUTIES AND RESPONSIBILITIES SSD firmware design... cycle of development, starting from requirements, high/low level design, implementation, unit testing, and support...

Company: Western Digital
Location: Milpitas, CA
Posted Date: 21 Dec 2024

Staff Engineer - Firmware Development Infra

, we're the next BIG thing in data. Job Description ESSENTIAL DUTIES AND RESPONSIBILITIES SSD firmware design... cycle of development, starting from requirements, high/low level design, implementation, unit testing, and support...

Company: Western Digital
Location: Milpitas, CA
Posted Date: 21 Dec 2024
Salary: $104295 - 147700 per year

Staff Engineer - Firmware Development Infra

, we’re the next BIG thing in data. Job Description ESSENTIAL DUTIES AND RESPONSIBILITIES SSD firmware design... cycle of development, starting from requirements, high/low level design, implementation, unit testing, and support...

Company: Western Digital
Location: Milpitas, CA
Posted Date: 05 Dec 2024

Power Distribution Network Engineer, Staff

verification and physical design teams to define, implement, and verify power delivery solutio Minimum Qualifications...: • Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 31 Oct 2024

Software Dev Engineer - AI/ML, AWS Neuron Distributed Training

engineer and ML chip accelerator, ASIC, physical designs, SDE in Test. Because of our teams' breadth of talent, we've been able... and Hardware engineers including but not limited to complier engineer, machine learning engineer, runtime engineer, performance...

Company: Amazon
Location: Cupertino, CA
Posted Date: 12 Dec 2024
Salary: $99500 per year

Software Dev Engineer - Machine Learning Apps, Accelerator, Annapurna ML

engineer and ML chip accelerator, ASIC, physical designs, SDE in Test. Because of our teams' breadth of talent, we've been able... and Hardware engineers including but not limited to compiler engineer, machine learning engineer, runtime engineer, performance...

Company: Amazon
Location: Cupertino, CA
Posted Date: 12 Dec 2024
Salary: $99500 per year

Software Dev Engineer - Embedded, Runtime, Storage, System & Performance , Annapurna Labs

and ML chip accelerator, ASIC, physical designs. Because of our teams' breadth of talent, we've been able to improve AWS... engineers including but not limited to: compiler engineer, machine learning engineer, runtime engineer, performance engineer...

Company: Amazon
Location: Seattle, WA
Posted Date: 12 Dec 2024
Salary: $99500 per year

2025 Software Dev Engineer Intern - Compiler, Annapurna ML

but not limited to compiler engineer, machine learning engineer, runtime engineer, performance engineer and ML chip accelerator, ASIC..., physical designs, SDE in Test. Because of our teams' breadth of talent, we've been able to improve AWS cloud infrastructure...

Company: Amazon
Location: Cupertino, CA
Posted Date: 11 Dec 2024
Salary: $47.84 per hour

Software Dev Engineer - Compiler, Annapurna Labs

engineer and ML chip accelerator, ASIC, physical designs, SDE in Test. Because of our teams' breadth of talent, we've been able... and Hardware engineers including but not limited to complier engineer, machine learning engineer, runtime engineer, performance...

Company: Amazon
Location: Cupertino, CA
Posted Date: 10 Dec 2024
Salary: $99500 per year

2025 Software Dev Engineer Intern - Machine Learning Apps, Accelerator, Annapurna ML

engineer, machine learning engineer, runtime engineer, performance engineer and ML chip accelerator, ASIC, physical designs... operational safety Writing requirements capturing documents, design documents, integration test plans, and deployment plans...

Company: Amazon
Location: Cupertino, CA
Posted Date: 09 Dec 2024
Salary: $47.84 per hour

Sr. Emulation Engineer - HAPS

Software services. Our business model is to offer our services based on turnkey, Offshore design center (ODC) or staff... augmentation. Services offered by Prodapt ASIC BU: SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation...

Company: Prodapt
Location: San Jose, CA
Posted Date: 05 Dec 2024

Lead Engineer, Cellular Software

Description : Kyocera Lead Cellular Software Engineer Company Overview With nearly 80,000 employees globally..., which you can learn more about Come find out why we have so many long tenured staff (many with over 30 years of service...

Company: Kyocera
Location: San Diego, CA
Posted Date: 06 Nov 2024

Silicon Validation Engineer III

validation engineers along with development partners responsible for all stages of network ASIC design and validation...Silicon Validation Engineer III This role has been designed as ‘’Onsite’ with an expectation that you will primarily...

Posted Date: 05 Nov 2024

R&D Engineer

R&D Staff Engineer The ideal candidate will have expertise in integrated-circuit process technologies... extraction and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification Conducting design reviews...

Company: Broadcom
Location: San Jose, CA
Posted Date: 30 Oct 2024
Salary: $107000 - 190000 per year

Power Optimization/Modeling Lead

in electrical circuits, VLSI and IP design fundamentals Deep familiarity with ASIC/SoC Design cycles and methodologies including... RTL, Verification, Emulation, Physical Design and post-si validation Fluent familiarity with power tools like Power...

Location: Austin, TX
Posted Date: 21 Nov 2024