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Keywords: SoC Power Engineer, Location: Austin, TX

Page: 2

ASIC Engineer, Physical Design

on Chip (SoC) and IP for data center applications. ASIC Engineer, Physical Design Responsibilities Develop and own..., and drive execution. Deliver physical design of an end-to-end IP or integration of ASIC/SoC design and point out lower power...

Company: Meta
Posted Date: 30 Jan 2025

ASIC Engineer, Physical Design

on Chip (SoC) and IP for data center applications. ASIC Engineer, Physical Design Responsibilities Develop and own..., and drive execution. Deliver physical design of an end-to-end IP or integration of ASIC/SoC design and point out lower power...

Company: Meta
Posted Date: 27 Jan 2025

MBIST Engineer (DFT)

of people around the world. Come build with us! Role and Responsibilities The MBIST Engineer (DFT) is responsible... for designing and implementing Memory Built-in Self Test (MBIST) solutions across a variety of digital IP (CPU/GPU) and SOC projects...

Company: 삼성전자
Location: Austin, TX
Posted Date: 24 Jan 2025

DFx Engineer

of people around the world. Come build with us! Role and Responsibilities As a seasoned DFx engineer, you will be involved... only. You understand SOC requirements and project milestones to help define a DFT architecture which optimally balances between coverage...

Company: 삼성전자
Location: Austin, TX
Posted Date: 24 Jan 2025

ASIC Implementation Engineer - Synthesis

, synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Implementation Engineer... Level Netlist for Timing, Area, Power. Debug the timing/area/congestion issues and work with RTL & Physical designers...

Company: Meta
Posted Date: 24 Jan 2025

ASIC Implementation Engineer - Timing

, synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Implementation Engineer - Timing... Responsibilities Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC...

Company: Meta
Posted Date: 24 Jan 2025

ASIC Implementation Engineer - Timing

, synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Implementation Engineer - Timing... Responsibilities Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC...

Company: Meta
Posted Date: 24 Jan 2025

ASIC Implementation Engineer - Static Verification

, synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Implementation Engineer - Static... Level Netlist for Timing, Area, Power. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC...

Company: Meta
Posted Date: 24 Jan 2025

Principal Application Engineer – System VIP

opportunities, the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead in your career... tests at complex Subsystem or SOC level test-benches, creating UVM/C tests that run on ARM/DSP/RISC-V cores. Exposure...

Location: Austin, TX
Posted Date: 24 Jan 2025

Graphics FE Integration Engineer

parameters, physical constraints, DFT logic and power intent. Description Description As a GPU Design Integration Engineer... and manufacture our next-generation, high-performance, power-efficient GPU! You'll ensure Apple products and services can seamlessly...

Company: Apple
Location: Austin, TX
Posted Date: 16 Jan 2025

Graphics FE Integration Engineer

parameters, physical constraints, DFT logic and power intent. Description Description As a GPU Design Integration Engineer... and manufacture our next-generation, high-performance, power-efficient GPU! You'll ensure Apple products and services can seamlessly...

Company: Apple
Location: Austin, TX
Posted Date: 15 Jan 2025

Staff RFIC Design Engineer

Owning the complete analog front-end and delivering to SoC team Guide the layout engineer from floorplan through post-layout... that transform industries, grow economies and improve lives. Staff RF IC Design Engineer Austin, TX Responsibilities Our team...

Company: Silicon Labs
Location: Austin, TX
Posted Date: 15 Jan 2025
Salary: $135800 per year

Sr. Design Verification Engineer (Coherent Interconnect)

of people around the world. Come build with us! Role and Responsibilities As a Sr. Design Verification Engineer... and functional coverage results and perform gap analysis You identify coverage exclusions and improve stimulus You work with SoC...

Company: 삼성전자
Location: Austin, TX
Posted Date: 09 Jan 2025

Principal Design Verification Engineer (Coherent Interconnect)

of people around the world. Come build with us! Role and Responsibilities As a Principal Design Verification Engineer... and improve stimulus You work with SoC team to debug functional fails during IP bringup and feature execution You collaborate...

Company: 삼성전자
Location: Austin, TX
Posted Date: 09 Jan 2025

Lead R&D Engineer - RedHawk-SC

signoff for SoC designs. RedHawk-SC enables creation of high-performance SoCs that are still power efficient and reliable.... For more than 50 years, Ansys software has enabled innovators across industries to push boundaries by using the predictive power...

Company: Ansys
Location: Austin, TX
Posted Date: 08 Jan 2025

CPU Core RTL Design Engineer

_ CPU CORE RTL DESIGN ENGINEER THE ROLE: As a CPU Core Architecture/RTL Engineer, you will have a unique opportunity...-performance processor cores. Participate and/or drive activities related to power reduction, timing closure and performance...

Location: Austin, TX
Posted Date: 25 Dec 2024

Digital Verification Engineer

that transform industries, grow economies and improve lives. Digital Verification Engineer Austin, TX Meet the Team... with analog and digital peripherals, advanced security, advanced power management, and best in class low power wireless modems...

Company: Silicon Labs
Location: Austin, TX
Posted Date: 19 Dec 2024
Salary: $150500 per year

Hardware Board Design Engineer

_ THE ROLE: As a Hardware Board design engineer, you will lead and be part of the design team developing state-of-the-art... of challenging product development projects. THE PERSON: AMD's Data Center division is looking for a Board Design Engineer...

Location: Austin, TX
Posted Date: 05 Dec 2024

Design Verification Methodology Engineer - (UVM/SV)

covering design technology, functional verification technology, coverage, debug, low power technology, and automation... and code coverage methodology for faster coverage closure Demonstrate and utilize strong debugging skills in SOC/IP design...

Location: Austin, TX
Posted Date: 27 Feb 2025

Physical Design Methodology CAD Engineer

, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently...-performance, power-efficient SoCs. You will work on world class CPU, GPU, Analog/Mixed Signal and SOC designs by developing flows...

Company: Apple
Location: Austin, TX
Posted Date: 26 Feb 2025