Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: SoC Performance Architect, Location: San Jose, CA

Page: 1

SoC Performance Architect

of people around the world. Come build with us! Role and Responsibilities As SoC Performance Architect, you will primarily..., leadership, and SoC modeling experience is desired for success. You build and develop complex SoC performance models including...

Company: 삼성전자
Location: San Jose, CA
Posted Date: 05 Dec 2024

PCIe SOC RTL Design Lead

_ THE ROLE: We are looking for an adaptive, self-motivated senior design micro-architect & leader to join our growing team... of microarchitecture of next-generation high-performance PCIe/CXL connectivity solutions. Lead a team of hardware engineers, responsible...

Posted Date: 01 Nov 2024

Design Engineering Architect

Engineering Architect The Cadence Silicon Solution Group (SSG) develops industry leading IPs that enable our customers... in a variety of markets - from the endpoint to the edge to the cloud and AI for SoC and chiplets. At Cadence we are helping set the...

Posted Date: 05 Dec 2024

Memory Architect

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Memory Architect... to develop products that make data faster and safer. As a Memory Architect, the candidate will be reporting to the Director...

Company: Rambus
Location: San Jose, CA
Posted Date: 01 Nov 2024

ASIC Engineer

. Your Impact: You will gain hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the... best industry practices, from specification through tape-out and lab validation. You will: Architect block, cluster and top...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 07 Dec 2024

ASIC Engineering Technical Leader

. Your Impact: You will gain hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the... best industry practices, from specification through tape-out and lab validation. You will: Architect block, cluster and top...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 07 Dec 2024

ASIC Engineering Technical Leader

validation, and a proven track record of success in high-performance/high-volume semiconductor markets. Architect block, cluster... and in-depth knowledge of SoC development cycle and the best industry practices, from specification through tape-out and lab...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 03 Dec 2024

ASIC Engineering Technical Leader

validation, and a proven track record of success in high-performance/high-volume semiconductor markets. Architect block, cluster... and in-depth knowledge of SoC development cycle and the best industry practices, from specification through tape-out and lab...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 03 Oct 2024

ASIC Engineer

validation, and a proven track record of success in high-performance/high-volume semiconductor markets. Architect block, cluster... and in-depth knowledge of SoC development cycle and the best industry practices, from specification through tape-out and lab...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 01 Oct 2024