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Keywords: Silicon Design Engineer, Location: San Diego, CA

Page: 1

CPU Power Modeling Engineer

and optimization Deep understanding of CPU low power design including expertise in active, Idle and low power minimization techniques... workloads and benchmarks Knowledge of logic design principles along with power and timing implications Preferred...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 25 Feb 2026
Salary: $148300 - 222500 per year

High-Speed CMOS DAC/ADC/PLL Analog Design Engineer

High-Speed CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine... Responsibilities Clock generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components...

Location: San Diego, CA
Posted Date: 07 Mar 2026

Principal Analog Design Engineer

Principal Analog Design Engineer Locations: Irvine, CA or remote + travel to Irvine Responsibilities Clock... generation and distribution (VCOs, PLL, clock distribution, etc) Design of custom passive components, from concept to silicon...

Location: San Diego, CA
Posted Date: 07 Mar 2026

Principal SoC RTL Design Engineer (remote)

Principal SoC RTL Design Engineer Remote / work from any US location US Citizen or US Permanent Resident Primary... Responsibilities: Assist with silicon bring-up Contribute to all areas of SoC design, verification, and implementation Design...

Location: San Diego, CA
Posted Date: 05 Mar 2026

Staff Analog Design Engineer

density solutions to reduce cost of test while pushing performance forward. As a Staff Analog Design Engineer... junior engineers, and play a key role in delivering high quality silicon. This role is based in San Diego, CA and requires...

Posted Date: 08 Jan 2026
Salary: $145000 - 195000 per year

Graphics ASICS Hardware Design Engineer

design throughout the entire project cycles Optimize the silicon cost and improve clock speed Troubleshoot silicon issues... and across all levels. What you will be doing : Micro-architect and design RTL for blocks and modules of Adreno GPU architecture...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 03 Mar 2026

Analog/Mixed Signal ASIC Design Engineer

1. Work in our MSIP analog design team to develop various mixed-signal IP above including architecture definition..., and analog/digital design partitioning and schematic design. 2. Schematic capture and circuit simulations in the Cadence Virtuoso...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Senior Video Design Engineer

, and power requirements Reviewing linting, synthesis, CLP, CDC, and DV coverage reports Maintaining comprehensive design... documentation Supporting post-silicon debug Communicating effectively and managing multiple tasks RTL implementation using Verilog...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Analog/Mixed Signal ASIC Design Engineer

1. Work in our analog design team for schematic capture and simulations and participate in architecture definition... and analog/digital design partitioning. 2. Schematic capture and simulations in the Cadence Virtuoso tool suite. 3. Work...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Staff/Sr. Staff Design Verification Engineer - QGOV

and other vectors. Design, develop, and maintain CAD infrastructure for silicon design teams enabling bring up, test and debug... test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

ASIC Design Verification Engineer (Security Group)

. Execute Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features... of memory organization, fault-tolerant design, parity schemes, error detection and error correction schemes. Advance techniques...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

GPU Design Verification Engineer

, Software , Firmware, Design , Modeling, Emulation and Post-silicon validation teams to define and develop test methodology... for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Staff/ Sr. Staff Design Verification Engineer - QGOV

and other vectors. Design, develop, and maintain CAD infrastructure for silicon design teams enabling bring up, test and debug... test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Senior Design Verification Engineer - QGOV

and other vectors. Design, develop, and maintain CAD infrastructure for silicon design teams enabling bring up, test and debug... test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Graphics ASICS Hardware Design Engineer

speed Troubleshoot silicon issues with products relevant to the corresponding design..., typically from 3 years to 20 years. ### Experience with Verilog/SystemVerilog design, Synopsys synthesis, low power design, test...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

ASIC Design Engineer (Hardware Security)

Bachelor's degree in electrical engineering, or related Sciences 6+ years of experience in ASIC design Experience... and understanding of ASIC design flow: Architecture, Microarchitecture, verilog/system-verilog RTL design, Clock Domain Crossings, DFT...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

CPU Physical Design Pathfinding Engineer

optimization methods relevant to the designs. Partner with Process, SoC and Post-silicon teams to analyze, improve design... for synthesis, place & route, and tapeout flows. Strong data analytical skills to identify and address physical design issues...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

Senior Design Verification Engineer - QGOV

and other vectors. Design, develop, and maintain CAD infrastructure for silicon design teams enabling bring up, test and debug... test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

High-speed Interface Micro Architect and RTL Design Engineer

Architect and define the digital design of high-speed interface IPs (e.g., SerDes, DDR, die-to-die) in close... blocks Apply advanced techniques in computer architecture, digital signal processing, and ASIC design to enhance power...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026

GPU Design Verification Engineer- Power

Work with Architecture and Design team to understand the low power design features and create verification plan Develop... test plan documents for the design features and get them reviewed with design team Develop verification components...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 Mar 2026