desirable: ~ PhD/MS with ~ Applications that included high speed Serdes 112, PCIeX5, PCIeX6, LPDDR4, LPDDR5, Ethernet 25...Reporting to the Director Packaging Design you will be a key senior technical contributor on a high-skill, multi-site...
_ ASIC DESIGN ENGINEER THE ROLE: A senior technical contributor that drives end-to-end delivery of SerDes solution... valued. KEY RESPONSIBILITIES: As an ASIC Design Engineer, your responsibilities span various aspects of SOC design...
_ RTL DESIGN ENGINEER THE ROLE: We are looking for a self-motivated design engineer to be part of a leading team... contributor, you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect...
Job Title: Sr. ATE Test Engineer Job Location: San Jose, CA Compensation: $100K - $200K base Depending on experience... enablement of CXL (Computing Express Link) technology. We are working on a CXL/PCIe-based chip for cloud computing applications...