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Keywords: RTL Design Engineer, Location: Cupertino, CA

Page: 2

ASIC Design Engineer - Pixel IP

getting functional products to millions of customers quickly. Description Description As an ASIC Design Engineer in the... in IP/SoC front-end ASIC RTL digital logic design using Verilog and System Verilog. Industry exposure to and knowledge...

Company: Apple
Location: Cupertino, CA
Posted Date: 09 Oct 2024

Design Verification Engineer

that no one has solved yet? Do you like changing the game? We have an opportunity for an outstandingly hardworking design... verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft...

Company: Apple
Location: Cupertino, CA
Posted Date: 08 Oct 2024

ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team

of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design....S. in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ years...

Company: Amazon
Location: Cupertino, CA
Posted Date: 19 Dec 2024
Salary: $143300 per year

2025 ASIC Physical Design Engineer Intern, Annapurna Labs

Tcl or PERL scripts to improve physical design flows and methods Collaborate with RTL, DFT designers to ensure high.... In Annapurna Labs we are at the forefront of hardware co-design not just in Amazon Web Services (AWS) but across the industry. The...

Company: Amazon
Location: Cupertino, CA
Posted Date: 18 Dec 2024
Salary: $104000 per year

ASIC Design Engineer

analysis on suggested architecture(s) and algorithm(s) Perform RTL design and logic implementation of agreed architecture... detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 13 Dec 2024

Hardware Systems Engineer - Board Design

and transmission lines, timing analysis, digital logic RTL experience using Verilog or VHDL. Preferably FPGA design experience... detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 24 Nov 2024

High Speed Analog/Mixed-Signal IC Design Engineer

: Demonstrated proficiency in high-speed analog/mixed-signal architecture and circuit design, including frequency synthesizers, CDR.../debugging RTL, developing System Verilog models, and performing behavioral simulations to explore new architectural performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 02 Nov 2024

High Speed Analog/Mixed-Signal IC Design Engineer

: Demonstrated proficiency in high-speed analog/mixed-signal architecture and circuit design, including frequency synthesizers, CDR.../debugging RTL, developing System Verilog models, and performing behavioral simulations to explore new architectural performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 02 Nov 2024

PLL/Clocking Design Engineer

performance and impact on loop dynamics. Ability to design/debug RTL is a plus. Attention to Detail: Exceptional focus...: Demonstrated proficiency in PLL/FLL and frequency synthesis architecture and circuit design. This includes digital and analog...

Company: Apple
Location: Cupertino, CA
Posted Date: 31 Oct 2024
Salary: $121900 - 183600 per year

PLL/Clocking Design Engineer

performance and impact on loop dynamics. Ability to design/debug RTL is a plus. Attention to Detail: Exceptional focus...: Demonstrated proficiency in PLL/FLL and frequency synthesis architecture and circuit design. This includes digital and analog...

Company: Apple
Location: Cupertino, CA
Posted Date: 31 Oct 2024

PLL/Clocking Design Engineer

performance and impact on loop dynamics. Ability to design/debug RTL is a plus. Attention to Detail: Exceptional focus...: Demonstrated proficiency in PLL/FLL and frequency synthesis architecture and circuit design. This includes digital and analog...

Company: Apple
Location: Cupertino, CA
Posted Date: 31 Oct 2024

Digital Design Methodology Engineer

with all aspects of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities... design. Work with RTL and physical design teams to implement and customize design flows that are optimal for different IPs...

Company: Apple
Location: Cupertino, CA
Posted Date: 18 Oct 2024

ASIC Design Engineer - Pixel IP

analysis on suggested architecture(s) and algorithm(s) Perform RTL design and logic implementation of agreed architecture... detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 10 Oct 2024

ASIC Design Engineer - Pixel IP

analysis on suggested architecture(s) and algorithm(s) Perform RTL design and logic implementation of agreed architecture... detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance...

Company: Apple
Location: Cupertino, CA
Posted Date: 10 Oct 2024

STA Engineer

engineer to join our exciting team of problem solvers. Join our team and be responsible for groundbreaking IP development... and coordinating with multiple SOC teams. In this role, you will work collaboratively with various SOC teams to complete design...

Company: Apple
Location: Cupertino, CA
Posted Date: 15 Nov 2024

Analog Mixed Signal IP Integration Engineer

and 7+ years industry related experience Experience in RTL design, verification or integration Deep knowledge... Mixed Signal IP Integration Engineer! As a member of our dynamic group, you will have the rare and great opportunity to work...

Company: Apple
Location: Cupertino, CA
Posted Date: 12 Nov 2024

Neural Engine HW Modeling Engineer, Platform Architecture

. Join this team, and you'll collaborate with engineers across Apple to design how all of our technologies work in unison. In this role..., you will be part of the Neural Engine IP architecture team to define, architect, design, implement and deploy models for Neural Engine...

Company: Apple
Location: Cupertino, CA
Posted Date: 09 Nov 2024

Mixed-Signal IP Firmware Engineer

hardworking FW Design Engineer. As a member of our multifaceted group, you will have the outstanding and great opportunity... understanding of computer architecture. Solid understanding of ARM AHB/APB protocols. Deep knowledge of RTL design. Deep...

Company: Apple
Location: Cupertino, CA
Posted Date: 23 Oct 2024
Salary: $121900 - 183600 per year

Mixed-Signal IP Firmware Engineer

hardworking FW Design Engineer. As a member of our multifaceted group, you will have the outstanding and great opportunity... knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

Company: Apple
Location: Cupertino, CA
Posted Date: 18 Oct 2024

Mixed-Signal IP Firmware Engineer

hardworking FW Design Engineer. As a member of our multifaceted group, you will have the outstanding and great opportunity... knowledge of RTL design. Deep knowledge of Verilog and SystemVerilog. Experience with version control tools (git, Perforce...

Company: Apple
Location: Cupertino, CA
Posted Date: 17 Oct 2024