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Keywords: RTL, Location: California

Page: 7

Modem Design Engineer

and 20+ years of relevant industry experience. We seek individuals with expert design experience to understand RTL design... analysis and optimizations using advanced synthesis techniques and RTL design improvement for optimal area, timing and power...

Company: Apple
Location: San Diego, CA
Posted Date: 18 Jan 2025

Director, Technical Program Management - Silicon One (Software)

. Prior experience in managing both software and ASIC design flow (architecture, micro-architecture, RTL, Synthesis...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 17 Jan 2025

Technical Program Management, Leader - ASIC (Common Hardware Group)

. Prior experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 17 Jan 2025

Senior Design Engineer, Coherent High Speed Interconnect

like PCIE, CXL, AXI, CHI will be useful. Experience and knowledge in architecture, RTL design, performance analysis and power...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 17 Jan 2025

ASIC CAD Development Technical Leader

Familiarity with ASIC design process including RTL, synthesis, logic equivalence, DFT, and backend related methodology and tools...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 17 Jan 2025

Lead Application Engineer SCBU

with EDA tools on layout, STA, Extraction-SPEF/DSPF, Spice, IC/ASIC design flow experience from RTL to GDSII, custom circuit...

Company: Ansys
Posted Date: 17 Jan 2025

Design Verification Engineer

stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out...

Company: Apple
Location: Irvine, CA
Posted Date: 17 Jan 2025

SOC Verification Engineer

team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration..., you will be responsible for pre-silicon RTL verification of block and top-level SOC. With deep understanding of SOC architecture...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 17 Jan 2025

SoC ASIC Verification Engineer – New College Grad 2025

CPU. Work with architects, RTL designers, FPGA, emulation engineers to ensure that verification requirements...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 17 Jan 2025
Salary: $96000 - 184000 per year

SOC Verification Engineer

team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration..., you will be responsible for pre-silicon RTL verification of block and top-level SOC. With deep understanding of SOC architecture...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 17 Jan 2025

ASIC Design Engineer, Senior Technical Leader

and participate in micro-architecture specification reviews. Implement Verilog RTL to meet timing and performance requirements. Help... with RTL modification. Experience developing micro-architecture solutions and RTL implementation. Preferred Qualifications...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 16 Jan 2025

ASIC Design Engineer, Technical Leader

and participate in micro-architecture specification reviews. Implement Verilog RTL to meet timing and performance requirements. Help... and waveform debug experience. Experience resolving setup and hold timing violations with RTL modification. Experience developing...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 16 Jan 2025

Graphics FE Integration Engineer

. As a member of GPU FE Design integration team, you will create GPU RTL by integrating various IPs following architectural..., you will be responsible for: - RTL integration, partitioning, design analysis, qualification, packaging and delivery. - Run logic equivalence...

Company: Apple
Location: Santa Clara, CA
Posted Date: 16 Jan 2025

Computer Systems Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Location: San Diego, CA
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year

Senior System Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Location: El Cajon, CA
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year

Senior System Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year

Senior System Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Location: National City, CA
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year

Senior System Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Location: San Diego, CA
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year

Senior System Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Location: La Jolla, CA
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year

Senior System Engineer

. Familiarity with SoC design flow to include RTL, DFT, PD, Verification Hands-on development of low-level embedded system...

Company: Leidos
Location: Chula Vista, CA
Posted Date: 16 Jan 2025
Salary: $126100 - 227950 per year