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Keywords: Principal Verification Engineer, Location: Bangalore, Karnataka

Page: 4

SoC Physical Design (PD) lead

_ PMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Strategic Silicon Solution Group Full Chip Physical Design..., Synthesis, Logical equivalence, Physical Verification, Power design/implementation/signoff, and will act as a mentor/coach/guide...

Posted Date: 30 Oct 2024