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Keywords: Physical Design PPA Engineer, Location: Austin, TX

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CPU Physical Design Methodology Engineer

Engineering General Summary: As a CPU Physical Design Methodology Engineer, you will work with implementation and CAD teams.... Develop innovative techniques in Physical design and optimization space to help meet aggressive PPA targets. Work...

Company: Qualcomm
Location: Austin, TX
Posted Date: 01 Nov 2024
Salary: $122500 - 183700 per year

GPU Physical Design Engineer

. This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration... with the FE team to understand chip architecture and drive physical aspects early in design cycle. - Drive outstanding PD...

Company: Apple
Location: Austin, TX
Posted Date: 10 Nov 2024

GPU Physical Design Engineer, STA/Timing

, Clocking, DFT, Physical design and Post silicon engineering to ensure the best design practices are followed for a smooth.... - Interact with RTL, architecture teams to understand physical design constraints related to timing and be the central point...

Company: Apple
Location: Austin, TX
Posted Date: 26 Oct 2024

Physical Synthesis CAD Engineer

existing flows for Physical Synthesis, LEC and DFT Implementation - Support multiple design teams and work with cross... detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance...

Company: Apple
Location: Austin, TX
Posted Date: 13 Sep 2024

ASIC Engineer Intern, Design

Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers... accelerators. ASIC Engineer Intern, Design Responsibilities Participate in Micro-architecture, Design, and Verification reviews...

Company: Meta
Posted Date: 03 Nov 2024

Senior Logic Design Engineer

. We are looking for a Senior Logic Design Engineer to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team... with architecture, physical design (PD), design for test (DFT), and other teams to optimize tradeoffs within the design. Provide...

Company: Microsoft
Location: Austin, TX
Posted Date: 29 Sep 2024
Salary: $117200 per year

Sr. Coherent Interconnect Micro-architect/Logic designer

on logic debug and timing closure of the design. Solid engineer foundation and RTL design experience are desired for success... and power team on achieving performance and power goals. You partner with the physical design and CAD team to resolve...

Company: 삼성전자
Location: Austin, TX
Posted Date: 02 Nov 2024

Sr. Silicon Learning Engineer

to bridge the power/performance gaps between silicon and design, and continually improve our physical design and signoff... Implementation organization, your solid background in silicon and physical design implementation are desired for success...

Company: 삼성전자
Location: Austin, TX
Posted Date: 12 Sep 2024

CPU Implementation Engineer

, performance, and area (PPA) trade-offs - Drive RTL-to-GDS design convergence through microarchitecture and logic (RTL... design PPA Minimum Qualifications Minimum Qualifications - Bachelor's in EE/CE/related field required Key...

Company: Apple
Location: Austin, TX
Posted Date: 18 Aug 2024

CPU Implementation Methodology Engineer

drive CPU design initiatives and flow development. This is a tremendous opportunity for an engineer with Synthesis and PNR... and post silicon teams to improve optimization during Implementation - Contribute to aspects of Synthesis and Physical Design...

Company: Apple
Location: Austin, TX
Posted Date: 14 Aug 2024

CPU Implementation Methodology Engineer

drive CPU design initiatives and flow development. This is a tremendous opportunity for an engineer with Synthesis and PNR... and post silicon teams to improve optimization during Implementation Contribute to aspects of Synthesis and Physical Design...

Company: Apple
Location: Austin, TX
Posted Date: 14 Aug 2024

Senior Engineer (Multiple Openings)

as well as other markets. Produce quality RTL on schedule to meet PPA goals. Deliver quality micro-architectural level design documentation... within the IP and at the SoC level to drive the architectural definition. Partner with the physical design team to resolve...

Company: 삼성전자
Location: Austin, TX
Posted Date: 09 Nov 2024
Salary: $153051 - 189442 per year

Graphics FE Implementation Engineer

will be responsible for PPA optimization of the netlist, working collaboratively with the RTL and Physical design teams... Experience with physical synthesis, including logic and PPA optimization techniques Experience with Verilog, System Verilog...

Company: Apple
Location: Austin, TX
Posted Date: 02 Nov 2024

SoC Interconnect Architect

, or a related field. Proven experience as a Cache Coherency Architect, Design Engineer, or similar role with a focus on NoC IP... coherency architectures that align with the overall System-on-a-Chip (SoC) design Analyze our customer's requirements for cache...

Company: Encore Semi
Location: Austin, TX
Posted Date: 30 Aug 2024

SoC Interconnect Architect

, or a related field. Proven experience as a Cache Coherency Architect, Design Engineer, or similar role with a focus on NoC IP... coherency architectures that align with the overall System-on-a-Chip (SoC) design Analyze our customer's requirements for cache...

Company: Encore Semi
Location: Austin, TX
Posted Date: 29 Aug 2024