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Keywords: Junior RTL Design Engineer, Location: Bangalore, Karnataka

Page: 1

Junior RTL Design Engineer

digital design, RTL & FPGA development flows. Proficiency in HDLs like SystemVerilog/Verilog for RTL Design. Knowledge... for wireless baseband design. Participate in the architecture definition, implementation, and test plan development. Develop...

Posted Date: 26 Sep 2024

WLAN Phy (RTL) Design Engineer

Engineering General Summary: Title: WLAN PHY (Baseband) Digital Design Engineer General Summary: Qualcomm's Bangalore WLAN... PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP development for the latest WiFi standards...

Company: Qualcomm
Posted Date: 19 Sep 2024

WLAN PHY Baseband (RTL) Digital design Engineer- Senior

: Must have: Proficient in Verilog RTL coding, uArch, CDC check, PLDRC, Timing constraints, Python/Perl. Experience in design/debugging... Engineering General Summary: Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking Staff/Senior Staff VLSI Digital Design...

Company: Qualcomm
Posted Date: 29 Sep 2024

WLAN PHY Baseband(RTL) Digital Design Engineer

Engineering General Summary: Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI Digital Design Engineers to lead IP... with 1 to 3 years of hands-on experience in micro-architecting and developing complex IPs. Expertise in digital design, VLSI...

Company: Qualcomm
Posted Date: 19 Sep 2024

GPU (RTL) Design Engineer- Sr Staff

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... or related work experience. 3+ years of experience with circuit/logic design/validation (e.g., digital, analog, RF). 3...

Company: Qualcomm
Posted Date: 29 Sep 2024

ASIC RTL Design Sr Staff/Manager

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... experience. 3+ years of experience with circuit design (e.g., digital, analog, RF). 3+ years of experience utilizing...

Company: Qualcomm
Posted Date: 29 Sep 2024

CPU/IP Design - MTS/SMTS Silicon Design Engineer

-architecting and documentation of the design features Mentor the junior members of the RTL team to meet the team goals..._ SMTS SILICON DESIGN ENGINEER THE ROLE: The Core design team is responsible for development of ‘High performance...

Posted Date: 11 Aug 2024

SMTS Silicon Design Engineer AECG ASIC DV Lead

’s custom silicon/ASIC designs, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex... processor architecture, digital design, and verification in general. You are a team player who has excellent communication...

Posted Date: 24 Oct 2024

Wifi MAC -Design Engineer -Sr Staff

to execute on a complex project for a large modem design in advanced process nodes Work closely with RTL, DFT and PD leads... Engineering General Summary: 10+ years experience in Digital ASIC / Processor Design Strong fundamentals in core areas...

Company: Qualcomm
Posted Date: 08 Oct 2024

Sr Staff Engineer - Digital Design

and timeline for delivery. Propose digital architecture and develop RTL code starting from scratch. Guide junior designers... a timely fashion. Deep understanding of the entire digital design flow including RTL design, synthesis, constraint development...

Posted Date: 08 Oct 2024

Sr Staff Engineer - Digital Design

them to deliver robust design in a timely fashion. Deep understanding of the entire digital design flow including RTL... RTL design from scratch. Highly motivated and self-driven leader. Motivation to work in a multi-disciplinary team...

Posted Date: 07 Oct 2024

Staff Engineer, Digital Design

and Responsibilities: Ownership of developing the specification, micro architecture, and RTL design of modules as per requirements... of IPs and functional blocks. Guide Junior design engineers working on the development of timing constraints, lint checks...

Posted Date: 01 Oct 2024

Wifi MAC -Design Engineer -Sr Lead

for a large modem design in advanced process nodes Work closely with RTL, DFT and PD leads worldwide to take a project from Post... Engineering General Summary: 1-3 years experience in Digital ASIC / Processor Design Strong fundamentals in core areas...

Company: Qualcomm
Posted Date: 29 Sep 2024

DFT Engineer

_ SENIOR SILICON DESIGN ENGINEER - DFT THE ROLE: As a Senior Silicon Design Engineer, you will work with DFT experts... and Mentors for DFT Activities such as SCAN, ATPG,MBIST and DFT RTL Integration etc. THE PERSON: You have a passion for modern...

Posted Date: 26 Oct 2024

PD Engineer

_ SENIOR SILICON DESIGN ENGINEER KEY RESPONSIBILITIES: This position is for a physical design engineer in AMD’s Radeon... Off flows. Flow automation using perl/tcl programming. REQUIREMENTS: Experience in ASIC Physical Design from RTL...

Posted Date: 20 Oct 2024

Senior/Lead ASIC Engineer

Company Overview Proxeleras unmatched expertise in VLSI design is expanding into new frontiers in the international.... Visit for more information. Job Overview We are looking for a Senior Lead ASIC Engineer to join our team at Proxelera...

Company: Proxelera
Posted Date: 25 Sep 2024

Senior Formal Verification Engineer

We are currently seeking an experienced Formal Verification Engineer with strong CPU and verification fundamentals... for design teams with tool vendors. Additionally, you'll verify the micro-architecture using formal verification tools to employ...

Company: Nvidia
Posted Date: 30 Aug 2024

EMIR, IR DROP PD Engineer

_ MTS SILICON DESIGN ENGINEER KEY RESPONSIBILITIES: This position is for a physical design engineer in AMD’s Radeon.... Experience in ASIC Physical Design from RTL to GDSII 2. Excellent analytical and problem solving skills along with attention...

Posted Date: 23 Aug 2024

Staff Engineer - AMS Verification

Verification Engineer Digital Business Unit (DBU) Analog Devices is seeking Mixed Signal Design Verification Engineer... innovative design verification methodologies to reduce overall TTM, mentor junior DV engineers in the team. Expected to be the...

Posted Date: 04 Aug 2024

Principal Engineer

, etc), develop test case(UVM & assembly), verify and coverage analysis in RTL and gate level design. Mentor junior engineers... that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company...

Company: Marvell
Posted Date: 05 Oct 2024