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Keywords: Design Verification Principal Engineer, Location: Santa Clara, CA

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Principal Design Verification Engineer

technology. We develop the architecture, collaborate on IP development, create the physical design, and work with the world... standard tools and processes Develop constrained-random verification test environment using System Verilog, UVM and C...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 23 Aug 2024
Salary: $137510 - 206000 per year

Design Verification Engineer, Principal

for verification based on architecture and design specifications. Develop testbench components in Systemverilog, UVM, C, and C... for verification and design infrastructure automation. Conduct various reviews of design and verification tasks with engineering team...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 23 Aug 2024
Salary: $137510 - 206000 per year

Design Verification Engineer, Senior Staff

Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm... with direct reports). Principal Duties and Responsibilities: Leverages advanced GPU knowledge and experience to architect...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 07 Nov 2024

Principal Analog Mixed Signal IC Design Engineer

an exciting career opportunity. What You Can Expect As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key... and performing design verification using industry standard tools such as Spectre, MATLAB etc. What We're Looking For Hands...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2024
Salary: $144180 - 216000 per year

Principal Applications Engineer

a highly skilled and experienced Principal Applications Engineer specializing in SerDes IP DSP algorithms and mixed-signal... design and verification (e.g., Cadence, Synopsys). Experience with lab equipment for signal integrity analysis and debugging...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2024
Salary: $137510 - 206000 per year

Principal Product Development Engineer

a creative and experienced Principal, Product Development Engineer to join our Operations Engineering team. This role is pivotal... strategies for new product features including identification, specification, design and qualification of test fixtures and test...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Sep 2024

Principal Test Engineer

test plans and supporting various phases of manufacturing. Be responsible for design, development and verification of new..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a test development engineer in...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 22 Sep 2024
Salary: $120950 - 181200 per year

ASIC Digital Design Engineer - WiFi MAC

for all. As a Qualcomm Digital ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP (block... Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 25 Sep 2024

Sr. Staff Design Engineer (Low Power)

. Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation... design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 10 Oct 2024

Digital Design Engineer

+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science..., Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 26 Sep 2024

Sr DV CAD Engineer

Engineering General Summary: As a CAD Engineer focusing on the methodology and support of RTL design verification..., you will work with architecture, design, software and verification leads to develop technology critical to the development...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 11 Oct 2024
Salary: $133000 - 199000 per year

STA Engineer

across Physical Design, Timing Analysis, Synthesis, Physical Verification, Power signoff, and mentor/coach/guide Design Engineers..._ THE ROLE: The STA/Constraints Engineer is responsible for developing FullChip constraints and timing closure...

Posted Date: 14 Aug 2024