Description The EW Division of Leidos is looking for a Microelectronics Design Engineer to work with a multi..., procurement (i.e. domestic foundry interaction) Wafer-Level Design: digital, RF and/or mixed signal circuit design (schematic...
for our nation’s defense. The EW Division has an opening for a Senior Microelectronics Design Engineer to work with a multi... foundry interaction) Wafer-Level Design: digital, RF and/or mixed signal circuit design (schematic, layout), modeling...
Chip-Level Design Verification Engineer 5 openings, immediate start 12+ months assignment with possible extensions... Seeking an experienced Senior Design Verification Engineer with expertise in Chip Level Verification, HDMI, and SystemVerilog...
ASIC Chip Lead and Design Engineer Full-time/Direct-hire position 100% remote / work from any US location US Citizen... or US Permanent Resident only Job Description: ASIC Chip Lead and Design Engineer to take ownership of the full chip development...
formal verification of complex blocks to ensure functional correctness · Work with the design and communication systems team... and participate in system level verification using test benches constructed using UVM, System C and DPI-C · Develop a highly...
/Experience with HDL-based, register-transfer-level (RTL), digital logic design, verification languages, and functional... world of chip, board, and system design. Associate Engineers are members of a team of highly motivated individuals working...
world of chip, board, and system design. Candidate must be located in San Diego* Job Description Interfaces with mid...-level customers, engineers, and managers to develop or enhance complex computer-aided engineering design or manufacturing...
, including AP clusters, IO Co-Processor system, fabric, power management, memory and other I/O devices •Design, implement... development •Implement firmware driver for PMIC and battery charging •Participate in the chip bring-up on simulator, emulation...
’s defense. The EW Division has an opening for a Senior Microelectronics Design Engineer to work with a multi-disciplined... foundry interaction) Wafer-Level Design: digital, RF and/or mixed signal circuit design (schematic, layout), modeling...
, Emulation, Design Verification, Test and Validation, and FW/SW engineering! As an RFIC Design Engineer within the Wireless Radio... wireless connectivity chip throughout productization. - Provide design versus silicon measurements correlation and compliance...
Design Engineer, you will work as a team member on block level and chip level physical design tasks. You will perform P&R...Job Title: Senior Physical Design Engineer Full-time: W2 Hourly + Benefits + Bonuses / Contractor Work Status...
Design Engineer, you will work as a team member on block level and chip level physical design tasks. You will perform P&R...Job Title: Senior Physical Design Engineer Full-time: W2 Hourly + Benefits + Bonuses / Contractor Work Status...
and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering! As an engineer within the Wireless Radio... solutions into hundreds of millions of products. Description Description As an RFIC Design Engineer, you will be responsible...
for functionality. Generate and Implement ECOs to fix timing etc. Run Timing verification flow at chip/block level and provide... hardworking Timing Design Engineer. As a member of our multifaceted group, you will have the outstanding and phenomenal...
for functionality. Generate and Implement ECOs to fix timing etc. Run Timing verification flow at chip/block level and provide... hardworking Timing Design Engineer. As a member of our multifaceted group, you will have the outstanding and phenomenal...
Perform feasibility study, design verification, and sign-off Minimum Qualifications Minimum Qualifications BS and 3... physical design of Power Delivery Networks (PDNs) and high-speed signals at PCB level Familiar with Cadence APD/Allegro...
multilayer mixed mode SMT circuit board design along with chip and wire (MIC) design approaches. A comprehensive knowledge... electronics packaging design Experience in MCM (Multi-chip Module) packaging SAP or Agile experience The ability to work...
(Onsite) NO remote/Hybrid As a Senior Digital Physical Design Engineer, you will work as a team member on block level... and chip level physical design tasks. You will perform P&R implementation of high-performance SoC designs, including logic...
(Onsite) NO remote/Hybrid As a Senior Digital Physical Design Engineer, you will work as a team member on block level... and chip level physical design tasks. You will perform P&R implementation of high-performance SoC designs, including logic...
across design and verification Knowledge of communication protocols such as AXI4-x, TileLink, DDRx, PCIe, etc. Good understanding... of chip-level functional model building Knowledge of Behavioral and Structural models and familiarity with simulation...