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Keywords: Assembly Process Integration Engineer, Location: Santa Clara, CA

Page: 1

Assembly Process Integration Engineer

The process industrialization group is looking for a motivated process engineer who is committed to the integration... years relevant industry experience. Experience in both thin-films development and integration specifically in assembly...

Company: Apple
Location: Santa Clara, CA
Posted Date: 28 Feb 2025

Assembly Process Integration Engineer

The process industrialization group is looking for a motivated process engineer who is committed to the integration... years relevant industry experience. Experience in both thin-films development and integration specifically in assembly...

Company: Apple
Location: Santa Clara, CA
Posted Date: 27 Feb 2025

EDA Design Flow Development Engineer

the lives of every person on earth. TD drives breakthrough research and develops next generation process/packaging... technology for our customers thru Design Technology Co-Optimization (DTCO), delivers the Process Design Kits (PDKs), foundational...

Company: Intel
Location: Santa Clara, CA
Posted Date: 18 Apr 2025

EDA Design Flow Development Engineer

breakthrough research and develops next generation process/packaging technologies, while also running high volume manufacturing... Design Technology Co-Optimization (DTCO), delivers the Process Design Kits (PDKs), foundational IPs (FIPs), and the Intel...

Company: Intel
Location: Santa Clara, CA
Posted Date: 17 Apr 2025

Hardware Engineer (High-speed IO design, Cadence Allegro, Altium, Simulation)

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Engineer in Test... and manage critical, high-cost components. Outsource fabrication and assembly to vendors with proven records of cost efficiency...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Apr 2025
Salary: $115790 - 173500 per year

Silicon Photonics Design & Packaging Engineer

architecture, assembly, optical coupling design and process for single-mode fiber packaging. We are looking for a hardworking... of high efficient optical I/O device/engine/module architecture, assembly, optical coupling design and process for single-mode...

Company: Apple
Location: Santa Clara, CA
Posted Date: 11 Apr 2025

Sr. Principal Hardware Engineer - Santa Clara, CA - Hybrid

on mechanical and thermal solutions, system assembly, and integration. Understand optical communications technologies and drive the... is seeking a senior principal Hardware Engineer to perform board-level circuit design, bring-up, and validation and coordinate...

Company: Gigamon
Location: Santa Clara, CA
Posted Date: 28 Mar 2025

Senior Physical Design Methodology Engineer

Engineer(s) to join our outstanding Networking Silicon engineering team, developing the industry's best high speed..., power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and back-end...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Mar 2025

Senior Physical Design Methodology Engineer, PPA Fusion Compiler

Engineer(s) - PPA Fusion Compiler to join our outstanding Networking Silicon engineering team, developing the industry... along with chip floorplan, power and clock distribution, chip assembly. Extensive timing knowledge to support timer...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 02 Mar 2025

Staff Hardware Engineer - Santa Clara - Hybrid

on mechanical and thermal solutions, and system assembly and integration. Understand optical communications technologies and drive... is seeking a Staff Hardware Engineer to perform board-level circuit design, bring-up and validation, and coordinate JDM/ODM/OEM...

Company: Gigamon
Location: Santa Clara, CA
Posted Date: 23 Feb 2025
Salary: $140000 - 175000 per year

Systems Engineer V

as necessary. Support System Integration during the assembly and final testing of new product designs. Work with vendors...; spearhead research and development of new technologies as appropriate; and work with the process team to insure the identified...

Location: Santa Clara, CA
Posted Date: 17 Apr 2025

LLVM Compiler Engineer

performance and areas for optimization Analyze and identify system level integration issues, interface with the software... development, integration and test teams Develop and execute benchmark and test scenarios for compilers and libraries Minimum...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 15 Apr 2025

GCC Compiler Engineer

level integration issues, interface with the software development, integration and test teams Develop and execute benchmark... Knowledge and experience in compiler frameworks such as gcc or LLVM Programming in C/C++ and assembly languages Knowledge...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 11 Apr 2025

Systems Engineer V - (E5)

. Influence and communicate change in adjusting design direction as necessary. Support System Integration during the assembly... requirements. Be able to chair architecture brainstorming meetings and drive the systems process to down select to a final...

Location: Santa Clara, CA
Posted Date: 26 Mar 2025

Software Application Engineer

both functional and test code, automates build and deployment, and performs unit integration and end-to-end testing of applications... every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing...

Company: Intel
Location: Santa Clara, CA
Posted Date: 13 Mar 2025

Mechanical/Controls Engineer - (E4)

, development and implementation of custom mechanical tooling, fixturing, and associated processes to enable the handling, assembly... tests, system integration, Configuration control & Serial production transition. Define, coordinate, perform, and generate...

Location: Santa Clara, CA
Posted Date: 27 Feb 2025

Systems Engineer IV - (E4)

and manufacturability. Support System Integration during the assembly and final testing of new product designs. Interface... and drive the systems process to down select to a final architecture of a top level system. Write detailed specifications...

Location: Santa Clara, CA
Posted Date: 03 Feb 2025

Quality Engineer (Fab)

with experience. POSITION SUMMARY: Develop and improve MEMS wafer fab and assembly processes, focusing specifically on quality... and yield improvement. Identify and investigate design/process/equipment issues that limit wafer yield. Manage production yield...

Company: Fujifilm
Location: Santa Clara, CA
Posted Date: 19 Jan 2025
Salary: $105000 - 135000 per year