Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Analog Design, Senior Staff Engineer, Location: Santa Clara, CA

Page: 1

Senior Staff Analog Mixed Signal IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal...; General Analog Circuits Participate the SerDes architecture development with the DSP, Analog and Digital design teams...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Feb 2025
Salary: $140350 - 210200 per year

Analog Design, Senior Staff Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog Design Engineer... of innovation in the field of High Speed SerDes Links. What You Can Expect As an analog circuit design engineer...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 02 Feb 2025
Salary: $128160 - 192000 per year

Analog IC Design Engineer, Senior Staff

understanding of analog mixed-signal design with experience in high-speed transceivers. Solid understanding and experience...-level feasibility. You will also drive schematic design and collaborate on mask design for implementation. And finally...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Apr 2025
Salary: $140350 - 210200 per year

Senior Staff Analog Mixed-Signal Design Engineer

. What You Can Expect Design and develop high-speed and low-power analog mixed-signal circuits in advanced CMOS technologies..., with a focus on SerDes (Serializer/Deserializer) die-to-die communication and high-speed wireline design. Design of analog mixed...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Feb 2025
Salary: $140350 - 210200 per year

Analog Modeling/Verification Senior Staff Engineer

experience. Solid experience in the followings: - Good understanding of CMOS analog design circuit. - Verilog/SystemVerilog... for - Creating Verilog/SystemVerilog behavioral models of analog circuits. - Creating programming sequences to verify analog...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 02 Feb 2025
Salary: $109650 - 164300 per year

Design Verification, Senior Staff Engineer

Expect ASIC design engineer responsible for the design, verification and evaluation of digital circuits in high-speed data... development and execution. As a senior member in the team, he/she will focus on improving the design verification methodology...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 Jan 2025
Salary: $121840 - 182500 per year

Senior Staff Applications Engineer

products. We are looking for a customer-facing, hands-on Senior Applications Engineer who is passionate about solving complex... to marketing and engineering. Drive Design Wins: Assist the sales team in securing key design wins for Marvell AEC Cables...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 26 Mar 2025
Salary: $121400 - 181800 per year