Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: ASIC Package Engineer, Location: USA

Page: 4

R&D Engineer Physical Design

Broadcom is looking for a Design Implementation Engineer with demonstrated expertise across key areas such as synthesis... timing constraints to ensure accurate and efficient timing analysis and closure. Expertise in place-and-route tools for ASIC...

Company: Broadcom
Location: San Jose, CA
Posted Date: 01 Mar 2025
Salary: $119000 - 190000 per year

Embedded Software Engineer, Kuiper Payload Software Systems

upgrade, fault management, switches control and ASIC configurations. Export Control Requirement Due to applicable export..., and operational excellence. A day in the life As a Software Development Engineer, you will play a crucial role in the advancement...

Company: Amazon
Location: Sunnyvale, CA
Posted Date: 01 Mar 2025
Salary: $129300 per year

Embedded Software Engineer, Merlin Manager

upgrade, fault management, switches control and ASIC configurations. Export Control Requirement Due to applicable export..., and operational excellence. A day in the life As a Software Development Engineer, you will play a crucial role in the advancement...

Company: Amazon
Location: Sunnyvale, CA
Posted Date: 01 Mar 2025
Salary: $129300 per year

R&D Engineer Physical Design

Broadcom is looking for a Design Implementation Engineer with demonstrated expertise in key areas such as synthesis... with Physical verification and place-and-route tools for ASIC/SoC design is essential Education/Experience: BS degree...

Company: Broadcom
Location: San Jose, CA
Posted Date: 01 Mar 2025
Salary: $119000 - 190000 per year

Design Verification Engineer

environment that drives positive impact to join our team. What you'll do: As a Design Verification Engineer, you will be part... of and lead a verification team responsible for the full cycle of RTL verification for FPGA and ASIC designs! Over the span...

Company: Viasat
Location: Tempe, AZ
Posted Date: 01 Mar 2025

CPU Physical Design Timing Engineer

Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive... Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus...

Company: Qualcomm
Location: Austin, TX
Posted Date: 01 Mar 2025

Design Verification Engineer

Engineer, you will be part of and lead a verification team responsible for the full cycle of RTL verification for FPGA and ASIC... be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits...

Company: Viasat
Location: Tempe, AZ
Posted Date: 28 Feb 2025

Senior Principal Engineer, Verification (Ethernet, Serdes, UVM)

a highly skilled and experienced Senior Principal Verification Engineer to join our dynamic team in Santa Clara, CA. The ideal.... As a Senior Principal Verification Engineer, you will play a critical role in ensuring the quality and reliability of our cutting...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Feb 2025

Server Chipset Power Engineer

performance solutions that are highly optimized for the needs of the server product. Position: Server Chipset Power Engineer... We are seeking a highly experienced Server Chipset Power Engineer to join our team. If you possess a deep understanding of Server SoC...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 27 Feb 2025

SMTS C++ Software Engineer, AI Open-Source Software

_ THE ROLE: AMD is looking for an influential software engineer who is passionate about improving the performance of key... Participating in new ASIC and hardware bring ups Debugging/fix existing issues and research alternative, more efficient ways...

Posted Date: 27 Feb 2025

Senior Principal Validation Engineer - SERDES

group designs and develops test platforms for validating multi-core Arm-based Network processors and custom ASIC’s, used... Principal SERDES signal integrity engineer to lead the validation for SERDES IP in the Data Center Hardware Engineering Group...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 23 Feb 2025
Salary: $164650 - 246700 per year

IP Integration Lead Engineer

Broadcom’s ASIC Product Division (APD) is focused on enabling customers to develop products with a sustainable... wireless solutions, as some examples. The IP Integration Lead Engineer will be part of a cross functional design team...

Company: Broadcom
Location: Fort Collins, CO
Posted Date: 23 Feb 2025

Sr. DSP Modem Embedded Engineer - Project Kuiper, Flight Computer Software

Modem Embedded Software Design Engineer, you will participate in all phases of DSP physical layer software development... closely with ASIC design, Verification and MAC systems and software teams to support board bring-up, integration, and testing...

Company: Amazon
Location: Redmond, WA
Posted Date: 23 Feb 2025
Salary: $151300 per year

Senior Staff Test Engineer

silicon, custom ASIC designs for industry leading customers, and innovative storage technologies to address all segments.... What You Can Expect Marvell is looking for highly motivated, talented Senior Staff Test Engineer. You will part of a dynamic NPI...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Feb 2025
Salary: $115790 - 173500 per year

Senior Staff Test Engineer

, 5G and 6G acceleration silicon, custom ASIC designs for industry leading customers, and innovative storage technologies..., and AI applications. What You Can Expect Marvell is looking for highly motivated, talented Senior Staff Test Engineer. You will part...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Feb 2025
Salary: $115790 - 173500 per year

High Speed Signal Integrity Engineer

products, be a part of the definition and design of current and next generation ASIC, package, printed circuit board (PCB.... Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs. Write signal integrity design...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 20 Feb 2025
Salary: $133300 - 186800 per year

Senior Firmware Engineer

will be needed to run human- and superhuman-level artificial intelligence. Our ASIC systems deliver orders of magnitude higher performance... than conventional AI chips. Etched is actively developing Sohu, an ASIC exclusively for transformers, which will enable...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025

Firmware Engineer

intelligence. Our ASIC systems deliver orders of magnitude higher performance than conventional AI chips. Etched is actively... developing , an ASIC exclusively for transformers, which will enable products that would be impossible with GPUs...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025

Cache DFT Verification Engineer

, client, and gaming business. We are looking for an experienced cache verification engineer to join this innovative team. The... with verification techniques of microprocessors/ASIC designs. Strong understanding of DFT concepts in areas of MBIST (Memory Built...

Posted Date: 20 Feb 2025

FPGA Engineer (eInfochips Inc.)

Position: FPGA Engineer (eInfochips Inc.) Job Description: What You'll Be Doing: Requirements capture, ASIC... and practices for continuous improvement in the group's ASIC / FPGA design flow Contribute to engineering estimates for new...

Location: Cedar Rapids, IA
Posted Date: 19 Feb 2025