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Keywords: ASIC Design and STA Engineer, Location: Bangalore, Karnataka

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MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER SOC PD - Front End Integration (FEINT) Lead THE ROLE: The scoping of SOC PD FEINT (Front...: 13+ years working experience on ASIC Implementation Knowledgeable in all aspects of ASIC design flow Familiar...

Posted Date: 12 Jan 2025

Senior Staff Digital Design Engineer - Power

Responsibilities: MaxLinear is seeking a Senior Staff Digital Design Engineer to join our Analog Mixed Signal (AMS... logic fundamentals. Engineer should be well versed in industry standard design and verification methodologies. Knowledge...

Company: MaxLinear
Posted Date: 18 Dec 2024

MTS Silicon Design Engineer ( SOC PD Front End Integration (FEINT) Lead )

Implementation Knowledgeable in all aspects of ASIC design flow Familiar with FEINT EDA tools Good leadership skills Good... Synthesis, Logic Equivalence, low power check, Timing Closure and full-chip SDC (constraints) generation. AMD design is big...

Posted Date: 16 Jan 2025

DFT Engineer

, architecture, and insertion. Proficiency in using EDA tools (e.g., Spyglass, Tessent). Experience in ASIC DFT synthesis, STA...As a Silicon AI/ML DFT Engineer, you will contribute to developing innovative silicon solutions powering...

Posted Date: 06 Dec 2024

Methodology Development Lead Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...+ year of Hardware Engineering or related work experience. Job Description: As a digital ASIC R&D Engineer, you will play...

Company: Qualcomm
Posted Date: 14 Dec 2024

Principal Engineer - DFT

for multiple Custom/Compute ASIC/SoC designs. The execution involves Design-for-Test Architecture definition, Implementation... ,Spyglass/Tmax) Prior experience in ASIC design is a plus Scripting skills using PERL, Tcl and C-Shell is plus Additional...

Company: Marvell
Posted Date: 06 Feb 2025

Senior Staff Engineer - DFT

,NCSim ) Prior experience in ASIC design is a plus Scripting skills using PERL, Tcl and C-Shell is plus Additional... and design all the way through layout, packaging, prototype validation and production ramp up. This group provides technology...

Company: Marvell
Posted Date: 05 Feb 2025

Principal Engineer - DFT

for multiple Custom/Compute ASIC/SoC designs The execution involves Design-for-Test Architecture definition, Implementation...,Spyglass/Tmax) Prior experience in ASIC design is a plus Scripting skills using PERL, Tcl and C-Shell is plus Additional...

Company: Marvell
Posted Date: 05 Feb 2025

Sr. Principal Engineer - DFT

for multiple Custom/Compute ASIC/SoC designs The execution involves Design-for-Test Architecture definition, Implementation...,Spyglass/Tmax) Prior experience in ASIC design is a plus Scripting skills using PERL, Tcl and C-Shell is plus Additional...

Company: Marvell
Posted Date: 18 Dec 2024

Associate III - VLSI GCAD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Floorplan Clocks P&R STA Extraction Physical Verificatione. Strong knowledge of Soft / Hard / Mixed Signal IP Design Processor...

Company: UST
Posted Date: 09 Feb 2025

Technical Lead I - VLSI GCAD Lead

Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis.... Strong Physical Design / Circuit Design / Analog Layout Knowledged. Synthesis DFT Floorplan Clocks P&R STA Extraction Physical...

Company: UST
Posted Date: 09 Feb 2025